It too was reverted later on.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
- .../drm/amd/display/dc/bios/bios_parser2.c | 19 ++++++++++++++-----
- .../display/include/grph_object_ctrl_defs.h | 2 ++
+ drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 19 ++++++++----
+ drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h | 2 +
2 files changed, 16 insertions(+), 5 deletions(-)
-diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
-index 72891d69afb6..c37fb66ec208 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -1018,13 +1018,20 @@ static enum bp_result get_ss_info_v4_5(
DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT ss_percentage: %d\n", ss_info->spread_spectrum_percentage);
break;
case AS_SIGNAL_TYPE_GPU_PLL:
-@@ -2836,6 +2843,8 @@ static enum bp_result get_integrated_info_v2_2(
+@@ -2830,6 +2837,8 @@ static enum bp_result get_integrated_inf
info->ma_channel_number = info_v2_2->umachannelnumber;
info->dp_ss_control =
le16_to_cpu(info_v2_2->reserved1);
for (i = 0; i < NUMBER_OF_UCHAR_FOR_GUID; ++i) {
info->ext_disp_conn_info.gu_id[i] =
-diff --git a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
-index bc96d0211360..813463ffe15c 100644
--- a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
+++ b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
@@ -417,6 +417,8 @@ struct integrated_info {
};
/*
---
-2.43.0
-
+++ /dev/null
-From ab7e61464f35014234d5e303c425968123d0ad13 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Fri, 1 Dec 2023 06:25:07 -0700
-Subject: drm/amd/display: Use channel_width = 2 for vram table 3.0
-
-From: Alvin Lee <alvin.lee2@amd.com>
-
-[ Upstream commit fec05adc40c25a028c9dfa9d540f800a2d433f80 ]
-
-VBIOS has suggested to use channel_width=2 for any ASIC that uses vram
-info 3.0. This is because channel_width in the vram table no longer
-represents the memory width
-
-Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
-Reviewed-by: Samson Tam <samson.tam@amd.com>
-Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
-Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
-index e507d2e1410b..72891d69afb6 100644
---- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
-+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
-@@ -2402,7 +2402,13 @@ static enum bp_result get_vram_info_v30(
- return BP_RESULT_BADBIOSTABLE;
-
- info->num_chans = info_v30->channel_num;
-- info->dram_channel_width_bytes = (1 << info_v30->channel_width) / 8;
-+ /* As suggested by VBIOS we should always use
-+ * dram_channel_width_bytes = 2 when using VRAM
-+ * table version 3.0. This is because the channel_width
-+ * param in the VRAM info table is changed in 7000 series and
-+ * no longer represents the memory channel width.
-+ */
-+ info->dram_channel_width_bytes = 2;
-
- return result;
- }
---
-2.43.0
-
nvme-prevent-potential-spectre-v1-gadget.patch
arm64-dts-rockchip-fix-pci-node-addresses-on-rk3399-.patch
mips-smp-call-rcutree_report_cpu_starting-earlier.patch
-drm-amd-display-use-channel_width-2-for-vram-table-3.patch
drm-amdgpu-add-null-checks-for-function-pointers.patch
drm-exynos-fix-a-potential-error-pointer-dereference.patch
drm-exynos-fix-a-wrong-error-checking.patch
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
- .../drm/amd/display/dc/bios/bios_parser2.c | 19 ++++++++++++++-----
- .../display/include/grph_object_ctrl_defs.h | 2 ++
+ drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 19 ++++++++----
+ drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h | 2 +
2 files changed, 16 insertions(+), 5 deletions(-)
-diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
-index c52356147148..95d65b48c456 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -1015,13 +1015,20 @@ static enum bp_result get_ss_info_v4_5(
DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT ss_percentage: %d\n", ss_info->spread_spectrum_percentage);
break;
case AS_SIGNAL_TYPE_GPU_PLL:
-@@ -2832,6 +2839,8 @@ static enum bp_result get_integrated_info_v2_2(
+@@ -2826,6 +2833,8 @@ static enum bp_result get_integrated_inf
info->ma_channel_number = info_v2_2->umachannelnumber;
info->dp_ss_control =
le16_to_cpu(info_v2_2->reserved1);
for (i = 0; i < NUMBER_OF_UCHAR_FOR_GUID; ++i) {
info->ext_disp_conn_info.gu_id[i] =
-diff --git a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
-index bc96d0211360..813463ffe15c 100644
--- a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
+++ b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
@@ -417,6 +417,8 @@ struct integrated_info {
};
/*
---
-2.43.0
-
+++ /dev/null
-From be1194a9929832d5e1bd0fdcd2925fb785ae6dab Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Fri, 1 Dec 2023 06:25:07 -0700
-Subject: drm/amd/display: Use channel_width = 2 for vram table 3.0
-
-From: Alvin Lee <alvin.lee2@amd.com>
-
-[ Upstream commit fec05adc40c25a028c9dfa9d540f800a2d433f80 ]
-
-VBIOS has suggested to use channel_width=2 for any ASIC that uses vram
-info 3.0. This is because channel_width in the vram table no longer
-represents the memory width
-
-Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
-Reviewed-by: Samson Tam <samson.tam@amd.com>
-Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
-Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
-index 484d62bcf2c2..c52356147148 100644
---- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
-+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
-@@ -2398,7 +2398,13 @@ static enum bp_result get_vram_info_v30(
- return BP_RESULT_BADBIOSTABLE;
-
- info->num_chans = info_v30->channel_num;
-- info->dram_channel_width_bytes = (1 << info_v30->channel_width) / 8;
-+ /* As suggested by VBIOS we should always use
-+ * dram_channel_width_bytes = 2 when using VRAM
-+ * table version 3.0. This is because the channel_width
-+ * param in the VRAM info table is changed in 7000 series and
-+ * no longer represents the memory channel width.
-+ */
-+ info->dram_channel_width_bytes = 2;
-
- return result;
- }
---
-2.43.0
-
nvme-fix-deadlock-between-reset-and-scan.patch
arm64-dts-rockchip-fix-pci-node-addresses-on-rk3399-.patch
mips-smp-call-rcutree_report_cpu_starting-earlier.patch
-drm-amd-display-use-channel_width-2-for-vram-table-3.patch
drm-amd-display-add-monitor-patch-for-specific-edp.patch
drm-amdgpu-add-null-checks-for-function-pointers.patch
drm-exynos-fix-a-potential-error-pointer-dereference.patch