iselStmt, case Ist_Exit: handle the same assisted transfer cases that

iselNext does.  Fixes #352320.

git-svn-id: svn://svn.valgrind.org/vex/trunk@3185

diff --git a/VEX/priv/host_arm64_isel.c b/VEX/priv/host_arm64_isel.c
index a3e55eba72a962f8e4c40a1236ddd2ab2182c221..a57240891e3f5d2bbef35d34b8ffdc01736ab386 100644 (file)
--- a/VEX/priv/host_arm64_isel.c
+++ b/VEX/priv/host_arm64_isel.c
@@ -3870,9 +3870,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
          = mk_baseblock_64bit_access_amode(stmt->Ist.Exit.offsIP);
 
       /* Case: boring transfer to known address */
-      if (stmt->Ist.Exit.jk == Ijk_Boring
-          /*ATC || stmt->Ist.Exit.jk == Ijk_Call */
-          /*ATC || stmt->Ist.Exit.jk == Ijk_Ret */ ) {
+      if (stmt->Ist.Exit.jk == Ijk_Boring) {
          if (env->chainingAllowed) {
             /* .. almost always true .. */
             /* Skip the event check at the dst if this is a forwards
@@ -3892,6 +3890,26 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
          return;
       }
 
+      /* Case: assisted transfer to arbitrary address */
+      switch (stmt->Ist.Exit.jk) {
+         /* Keep this list in sync with that for iselNext below */
+         case Ijk_ClientReq:
+         case Ijk_NoDecode:
+         case Ijk_NoRedir:
+         case Ijk_Sys_syscall:
+         case Ijk_InvalICache:
+         case Ijk_FlushDCache:
+         case Ijk_SigTRAP:
+         case Ijk_Yield: {
+            HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
+            addInstr(env, ARM64Instr_XAssisted(r, amPC, cc,
+                                               stmt->Ist.Exit.jk));
+            return;
+         }
+         default:
+            break;
+      }
+
       /* Do we ever expect to see any other kind? */
       goto stmt_fail;
    }