The raw cycle counter at PMCCNTR_EL0 works in qemu but seems to always
read as zero on physical hardware (tested on Juno r1 and Cavium
ThunderX), even after ensuring that PMCR_EL0.E and PMCNTENSET_EL0.C
are both enabled.
Use CNTVCT_EL0 instead; this seems to count at a lower resolution
(tens of CPU cycles), but is usable for profiling.
Signed-off-by: Michael Brown <mcb30@ipxe.org>
uint64_t cycles;
/* Read cycle counter */
- __asm__ __volatile__ ( "msr PMCR_EL0, %1\n\t"
- "mrs %0, PMCCNTR_EL0\n\t"
- : "=r" ( cycles ) : "r" ( 1 ) );
+ __asm__ __volatile__ ( "mrs %0, CNTVCT_EL0\n\t" : "=r" ( cycles ) );
return cycles;
}