gfx_v12_1_xcc_enable_atomics(adev, i);
gfx_v12_1_xcc_setup_tcp_thrashing_ctrl(adev, i);
}
-
- if (adev->gfx.imu.funcs &&
- adev->gfx.imu.funcs->init_mcm_addr_lut &&
- amdgpu_emu_mode)
- adev->gfx.imu.funcs->init_mcm_addr_lut(adev);
}
static int gfx_v12_1_hw_init(struct amdgpu_ip_block *ip_block)
num_xcc_per_xcp = __soc_v1_0_get_xcc_per_xcp(xcp_mgr, mode);
if (adev->gfx.imu.funcs &&
- adev->gfx.imu.funcs->switch_compute_partition)
- adev->gfx.imu.funcs->switch_compute_partition(xcp_mgr->adev, num_xcc_per_xcp, mode);
+ adev->gfx.imu.funcs->switch_compute_partition) {
+ ret = adev->gfx.imu.funcs->switch_compute_partition(xcp_mgr->adev, num_xcc_per_xcp, mode);
+ if (ret)
+ goto out;
+ }
+ if (adev->gfx.imu.funcs &&
+ adev->gfx.imu.funcs->init_mcm_addr_lut &&
+ amdgpu_emu_mode)
+ adev->gfx.imu.funcs->init_mcm_addr_lut(adev);
/* Init info about new xcps */
*num_xcps = num_xcc / num_xcc_per_xcp;