iio: mpl3115: add threshold events support

Add support for pressure and temperature rising threshold events. For
both channels *_en and *_value (in raw units) attributes are exposed.

Since in write_event_config() the ctrl_reg1.active and ctrl_reg4
are modified, accessing the data->ctrl_reg{1,4} in set_trigger_state()
and write_event_config() needs to be now guarded by data->lock.
Otherwise, it would be possible that 2 concurrent threads executing
these functions would access the data->ctrl_reg{1,4} at the same time
and then one would overwrite the other's result.

Signed-off-by: Antoni Pokusinski <apokusinski01@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c
index 5594256fffbd46e542e97b570d9c4ea725231d32..aeac1586f12ed4539f34403ed66d57a8af2b0e6d 100644 (file)
--- a/drivers/iio/pressure/mpl3115.c
+++ b/drivers/iio/pressure/mpl3115.c
@@ -14,11 +14,13 @@
 #include <linux/cleanup.h>
 #include <linux/delay.h>
 #include <linux/i2c.h>
+#include <linux/limits.h>
 #include <linux/module.h>
 #include <linux/property.h>
 #include <linux/unaligned.h>
 
 #include <linux/iio/buffer.h>
+#include <linux/iio/events.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 #include <linux/iio/triggered_buffer.h>
@@ -31,6 +33,8 @@
 #define MPL3115_WHO_AM_I 0x0c
 #define MPL3115_INT_SOURCE 0x12
 #define MPL3115_PT_DATA_CFG 0x13
+#define MPL3115_PRESS_TGT 0x16 /* MSB first, 16 bit */
+#define MPL3115_TEMP_TGT 0x18
 #define MPL3115_CTRL_REG1 0x26
 #define MPL3115_CTRL_REG2 0x27
 #define MPL3115_CTRL_REG3 0x28
@@ -43,6 +47,8 @@
 #define MPL3115_STATUS_TEMP_RDY BIT(1)
 
 #define MPL3115_INT_SRC_DRDY BIT(7)
+#define MPL3115_INT_SRC_PTH BIT(3)
+#define MPL3115_INT_SRC_TTH BIT(2)
 
 #define MPL3115_PT_DATA_EVENT_ALL GENMASK(2, 0)
 
@@ -57,6 +63,8 @@
 #define MPL3115_CTRL3_IPOL2 BIT(1)
 
 #define MPL3115_CTRL4_INT_EN_DRDY BIT(7)
+#define MPL3115_CTRL4_INT_EN_PTH BIT(3)
+#define MPL3115_CTRL4_INT_EN_TTH BIT(2)
 
 #define MPL3115_CTRL5_INT_CFG_DRDY BIT(7)
 
@@ -84,6 +92,7 @@ struct mpl3115_data {
        struct iio_trigger *drdy_trig;
        struct mutex lock;
        u8 ctrl_reg1;
+       u8 ctrl_reg4;
 };
 
 enum mpl3115_irq_pin {
@@ -313,6 +322,15 @@ done:
        return IRQ_HANDLED;
 }
 
+static const struct iio_event_spec mpl3115_temp_press_event[] = {
+       {
+               .type = IIO_EV_TYPE_THRESH,
+               .dir = IIO_EV_DIR_RISING,
+               .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
+                                BIT(IIO_EV_INFO_VALUE),
+       },
+};
+
 static const struct iio_chan_spec mpl3115_channels[] = {
        {
                .type = IIO_PRESSURE,
@@ -328,7 +346,9 @@ static const struct iio_chan_spec mpl3115_channels[] = {
                        .storagebits = 32,
                        .shift = 12,
                        .endianness = IIO_BE,
-               }
+               },
+               .event_spec = mpl3115_temp_press_event,
+               .num_event_specs = ARRAY_SIZE(mpl3115_temp_press_event),
        },
        {
                .type = IIO_TEMP,
@@ -344,7 +364,9 @@ static const struct iio_chan_spec mpl3115_channels[] = {
                        .storagebits = 16,
                        .shift = 4,
                        .endianness = IIO_BE,
-               }
+               },
+               .event_spec = mpl3115_temp_press_event,
+               .num_event_specs = ARRAY_SIZE(mpl3115_temp_press_event),
        },
        IIO_CHAN_SOFT_TIMESTAMP(2),
 };
@@ -354,15 +376,46 @@ static irqreturn_t mpl3115_interrupt_handler(int irq, void *private)
        struct iio_dev *indio_dev = private;
        struct mpl3115_data *data = iio_priv(indio_dev);
        int ret;
+       u8 val_press[3];
+       __be16 val_temp;
 
        ret = i2c_smbus_read_byte_data(data->client, MPL3115_INT_SOURCE);
        if (ret < 0)
                return IRQ_HANDLED;
 
-       if (!(ret & MPL3115_INT_SRC_DRDY))
+       if (!(ret & (MPL3115_INT_SRC_TTH | MPL3115_INT_SRC_PTH |
+                    MPL3115_INT_SRC_DRDY)))
                return IRQ_NONE;
 
-       iio_trigger_poll_nested(data->drdy_trig);
+       if (ret & MPL3115_INT_SRC_DRDY)
+               iio_trigger_poll_nested(data->drdy_trig);
+
+       if (ret & MPL3115_INT_SRC_PTH) {
+               iio_push_event(indio_dev,
+                              IIO_UNMOD_EVENT_CODE(IIO_PRESSURE, 0,
+                                                   IIO_EV_TYPE_THRESH,
+                                                   IIO_EV_DIR_RISING),
+                                                   iio_get_time_ns(indio_dev));
+
+               /* Reset the SRC_PTH bit in INT_SOURCE */
+               i2c_smbus_read_i2c_block_data(data->client,
+                                             MPL3115_OUT_PRESS,
+                                             sizeof(val_press), val_press);
+       }
+
+       if (ret & MPL3115_INT_SRC_TTH) {
+               iio_push_event(indio_dev,
+                              IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
+                                                   IIO_EV_TYPE_THRESH,
+                                                   IIO_EV_DIR_RISING),
+                                                   iio_get_time_ns(indio_dev));
+
+               /* Reset the SRC_TTH bit in INT_SOURCE */
+               i2c_smbus_read_i2c_block_data(data->client,
+                                             MPL3115_OUT_TEMP,
+                                             sizeof(val_temp),
+                                             (u8 *)&val_temp);
+       }
 
        return IRQ_HANDLED;
 }
@@ -383,6 +436,7 @@ static int mpl3115_config_interrupt(struct mpl3115_data *data,
                goto reg1_cleanup;
 
        data->ctrl_reg1 = ctrl_reg1;
+       data->ctrl_reg4 = ctrl_reg4;
 
        return 0;
 
@@ -396,15 +450,22 @@ static int mpl3115_set_trigger_state(struct iio_trigger *trig, bool state)
 {
        struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
        struct mpl3115_data *data = iio_priv(indio_dev);
-       u8 ctrl_reg1 = data->ctrl_reg1;
-       u8 ctrl_reg4 = state ? MPL3115_CTRL4_INT_EN_DRDY : 0;
+       u8 ctrl_reg1, ctrl_reg4;
 
-       if (state)
+       guard(mutex)(&data->lock);
+
+       ctrl_reg1 = data->ctrl_reg1;
+       ctrl_reg4 = data->ctrl_reg4;
+
+       if (state) {
                ctrl_reg1 |= MPL3115_CTRL1_ACTIVE;
-       else
-               ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
+               ctrl_reg4 |= MPL3115_CTRL4_INT_EN_DRDY;
+       } else {
+               ctrl_reg4 &= ~MPL3115_CTRL4_INT_EN_DRDY;
 
-       guard(mutex)(&data->lock);
+               if (!ctrl_reg4)
+                       ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
+       }
 
        return mpl3115_config_interrupt(data, ctrl_reg1, ctrl_reg4);
 }
@@ -413,10 +474,150 @@ static const struct iio_trigger_ops mpl3115_trigger_ops = {
        .set_trigger_state = mpl3115_set_trigger_state,
 };
 
+static int mpl3115_read_event_config(struct iio_dev *indio_dev,
+                                    const struct iio_chan_spec *chan,
+                                    enum iio_event_type type,
+                                    enum iio_event_direction dir)
+{
+       struct mpl3115_data *data = iio_priv(indio_dev);
+
+       if (chan->type == IIO_PRESSURE)
+               return !!(data->ctrl_reg4 & MPL3115_CTRL4_INT_EN_PTH);
+
+       if (chan->type == IIO_TEMP)
+               return !!(data->ctrl_reg4 & MPL3115_CTRL4_INT_EN_TTH);
+
+       return -EINVAL;
+}
+
+static int mpl3115_write_event_config(struct iio_dev *indio_dev,
+                                     const struct iio_chan_spec *chan,
+                                     enum iio_event_type type,
+                                     enum iio_event_direction dir,
+                                     bool state)
+{
+       struct mpl3115_data *data = iio_priv(indio_dev);
+       u8 int_en_mask;
+       u8 ctrl_reg1, ctrl_reg4;
+
+       switch (chan->type) {
+       case IIO_PRESSURE:
+               int_en_mask = MPL3115_CTRL4_INT_EN_PTH;
+               break;
+       case IIO_TEMP:
+               int_en_mask = MPL3115_CTRL4_INT_EN_TTH;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       guard(mutex)(&data->lock);
+
+       ctrl_reg1 = data->ctrl_reg1;
+       ctrl_reg4 = data->ctrl_reg4;
+
+       if (state) {
+               ctrl_reg1 |= MPL3115_CTRL1_ACTIVE;
+               ctrl_reg4 |= int_en_mask;
+       } else {
+               ctrl_reg4 &= ~int_en_mask;
+
+               if (!ctrl_reg4)
+                       ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
+       }
+
+       return mpl3115_config_interrupt(data, ctrl_reg1, ctrl_reg4);
+}
+
+static int mpl3115_read_thresh(struct iio_dev *indio_dev,
+                              const struct iio_chan_spec *chan,
+                              enum iio_event_type type,
+                              enum iio_event_direction dir,
+                              enum iio_event_info info,
+                              int *val, int *val2)
+{
+       struct mpl3115_data *data = iio_priv(indio_dev);
+       int ret;
+       __be16 press_tgt;
+
+       if (info != IIO_EV_INFO_VALUE)
+               return -EINVAL;
+
+       switch (chan->type) {
+       case IIO_PRESSURE:
+               ret = i2c_smbus_read_i2c_block_data(data->client,
+                                                   MPL3115_PRESS_TGT,
+                                                   sizeof(press_tgt),
+                                                   (u8 *)&press_tgt);
+               if (ret < 0)
+                       return ret;
+
+               /*
+                * Target value for the pressure is 16-bit unsigned value,
+                * expressed in 2 Pa units
+                */
+               *val = be16_to_cpu(press_tgt) << 1;
+
+               return IIO_VAL_INT;
+       case IIO_TEMP:
+               ret = i2c_smbus_read_byte_data(data->client, MPL3115_TEMP_TGT);
+               if (ret < 0)
+                       return ret;
+
+               /* Target value for the temperature is 8-bit 2's complement */
+               *val = sign_extend32(ret, 7);
+
+               return IIO_VAL_INT;
+       default:
+               return -EINVAL;
+       }
+}
+
+static int mpl3115_write_thresh(struct iio_dev *indio_dev,
+                               const struct iio_chan_spec *chan,
+                               enum iio_event_type type,
+                               enum iio_event_direction dir,
+                               enum iio_event_info info,
+                               int val, int val2)
+{
+       struct mpl3115_data *data = iio_priv(indio_dev);
+       __be16 press_tgt;
+
+       if (info != IIO_EV_INFO_VALUE)
+               return -EINVAL;
+
+       switch (chan->type) {
+       case IIO_PRESSURE:
+               val >>= 1;
+
+               if (val < 0 || val > U16_MAX)
+                       return -EINVAL;
+
+               press_tgt = cpu_to_be16(val);
+
+               return i2c_smbus_write_i2c_block_data(data->client,
+                                                     MPL3115_PRESS_TGT,
+                                                     sizeof(press_tgt),
+                                                     (u8 *)&press_tgt);
+       case IIO_TEMP:
+               if (val < S8_MIN || val > S8_MAX)
+                       return -EINVAL;
+
+               return i2c_smbus_write_byte_data(data->client,
+                                                MPL3115_TEMP_TGT, val);
+       default:
+               return -EINVAL;
+       }
+}
+
 static const struct iio_info mpl3115_info = {
        .read_raw = &mpl3115_read_raw,
        .read_avail = &mpl3115_read_avail,
        .write_raw = &mpl3115_write_raw,
+       .read_event_config = mpl3115_read_event_config,
+       .write_event_config = mpl3115_write_event_config,
+       .read_event_value = mpl3115_read_thresh,
+       .write_event_value = mpl3115_write_thresh,
 };
 
 static int mpl3115_trigger_probe(struct mpl3115_data *data,