drm/radeon: Make MSI address limit based on the device DMA limit

The radeon driver restricts the MSI message address for devices older than
the BONAIR generation to 32-bit MSI addresses due to the former
restrictions of the PCI/MSI code which only allowed either 32-bit or full
64-bit address range.

This does not work on platforms which have a MSI doorbell address above the
32-bit boundary but do not support the full 64 bit address range.

The PCI/MSI core converted this binary decision to a DMA_BIT_MASK() based
decision, which allows to describe the device limitations precisely.

Convert the driver to provide the exact DMA address limitations to the
PCI/MSI core. That allows devices which do not support the full 64-bit
address space to work on platforms which have a MSI doorbell address above
the 32-bit limit as long as it is within the hardware's addressable range.

[ tglx: Massage changelog ]

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Link: https://patch.msgid.link/20260129-pci-msi-addr-mask-v4-3-70da998f2750@iscas.ac.cn

diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 60afaa8e56b4bbb0ebbb61fc4e900ee8eab29c8e..5faae036136195073f8c86f70cb915e73b03b454 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1374,6 +1374,7 @@ int radeon_device_init(struct radeon_device *rdev,
                pr_warn("radeon: No suitable DMA available\n");
                return r;
        }
+       rdev->pdev->msi_addr_mask = DMA_BIT_MASK(dma_bits);
        rdev->need_swiotlb = drm_need_swiotlb(dma_bits);
 
        /* Registers mapping */

diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index d550554a6f3f2d64faf09b72431c206d0bb385ca..839d619e5602b3eb761f58271b218186c7945221 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -245,16 +245,6 @@ static bool radeon_msi_ok(struct radeon_device *rdev)
        if (rdev->flags & RADEON_IS_AGP)
                return false;
 
-       /*
-        * Older chips have a HW limitation, they can only generate 40 bits
-        * of address for "64-bit" MSIs which breaks on some platforms, notably
-        * IBM POWER servers, so we limit them
-        */
-       if (rdev->family < CHIP_BONAIRE) {
-               dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
-               rdev->pdev->msi_addr_mask = DMA_BIT_MASK(32);
-       }
-
        /* force MSI on */
        if (radeon_msi == 1)
                return true;