.macrotile_mode = true,
};
-static const struct qcom_ubwc_cfg_data x1e80100_data = {
- .ubwc_enc_version = UBWC_4_0,
- .ubwc_dec_version = UBWC_4_3,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
- .ubwc_bank_spread = true,
- /* TODO: highest_bank_bit = 15 for LP_DDR4 */
- .highest_bank_bit = 16,
- .macrotile_mode = true,
-};
-
static const struct qcom_ubwc_cfg_data glymur_data = {
.ubwc_enc_version = UBWC_5_0,
.ubwc_dec_version = UBWC_5_0,
{ .compatible = "qcom,sm8550", .data = &sm8550_data, },
{ .compatible = "qcom,sm8650", .data = &sm8550_data, },
{ .compatible = "qcom,sm8750", .data = &sm8750_data, },
- { .compatible = "qcom,x1e80100", .data = &x1e80100_data, },
- { .compatible = "qcom,x1p42100", .data = &x1e80100_data, },
+ { .compatible = "qcom,x1e80100", .data = &sm8550_data, },
+ { .compatible = "qcom,x1p42100", .data = &sm8550_data, },
{ }
};