Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4ca97b7554576b450b4d15ca4a13b2d7152a379c..741a6005c5581ad4752c3b4c2e630578ae5df320 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>
+
+       Backported from master:
+       2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>
+
+       * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
+       In loongarch64, a sign extension operation is added when
+       operands[2] is a register operand and the mode is SImode.
+
 2024-03-03  Oleg Endo  <olegendo@gcc.gnu.org>
 
        PR target/101737

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 7237a5054babfe7856a05c87aeb9d0ca79ac71e1..a187030afadcf718ed97bc351df453a18bc93792 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240309
+20240310

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0603cb4406491433977c483c7d174ad2dedaa00c..898abaff805f6419e2031694dab31f8caf253157 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>
+
+       Backported from master:
+       2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>
+
+       * g++.target/loongarch/atomic-cas-int.C: New test.
+
 2024-03-07  Eric Botcazou  <ebotcazou@adacore.com>
 
        * gnat.dg/predicate15.adb: New test.