arm64: dts: rockchip: Use standard PHY reset properties for RK3576 ArmSoM Sige5

Replace deprecated snps,reset-gpio, snps,reset-active-low, and
snps,reset-delays-us in gmac0 and gmac1 nodes with standard reset-gpios,
reset-assert-us, and reset-deassert-us in rgmii_phy0 and rgmii_phy1 nodes.
Add pinctrl properties to PHY nodes and define gmac0_rst and gmac1_rst in
pinctrl node. Reorder phy-handle for consistency.

Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20250520003332.163124-2-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
index b09e789c75c47fec7cf7e9810ab0dcca32d9404a..34e51cd71eac0395c7f36c892fc0711f6c324aea 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
@@ -218,30 +218,20 @@
 &gmac0 {
        phy-mode = "rgmii-id";
        clock_in_out = "output";
-
-       snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
-       snps,reset-active-low;
-       snps,reset-delays-us = <0 20000 100000>;
-
+       phy-handle = <&rgmii_phy0>;
        pinctrl-names = "default";
        pinctrl-0 = <&eth0m0_miim
                     &eth0m0_tx_bus2
                     &eth0m0_rx_bus2
                     &eth0m0_rgmii_clk
                     &eth0m0_rgmii_bus>;
-
-       phy-handle = <&rgmii_phy0>;
        status = "okay";
 };
 
 &gmac1 {
        phy-mode = "rgmii-id";
        clock_in_out = "output";
-
-       snps,reset-gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
-       snps,reset-active-low;
-       snps,reset-delays-us = <0 20000 100000>;
-
+       phy-handle = <&rgmii_phy1>;
        pinctrl-names = "default";
        pinctrl-0 = <&eth1m0_miim
                     &eth1m0_tx_bus2
@@ -249,8 +239,6 @@
                     &eth1m0_rgmii_clk
                     &eth1m0_rgmii_bus
                     &ethm0_clk1_25m_out>;
-
-       phy-handle = <&rgmii_phy1>;
        status = "okay";
 };
 
@@ -680,6 +668,11 @@
                compatible = "ethernet-phy-ieee802.3-c22";
                reg = <0x1>;
                clocks = <&cru REFCLKO25M_GMAC0_OUT>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&gmac0_rst>;
+               reset-assert-us = <20000>;
+               reset-deassert-us = <100000>;
+               reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
        };
 };
 
@@ -688,6 +681,11 @@
                compatible = "ethernet-phy-ieee802.3-c22";
                reg = <0x1>;
                clocks = <&cru REFCLKO25M_GMAC1_OUT>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&gmac1_rst>;
+               reset-assert-us = <20000>;
+               reset-deassert-us = <100000>;
+               reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
        };
 };
 
@@ -700,6 +698,15 @@
 };
 
 &pinctrl {
+       gmac {
+               gmac0_rst: gmac0-rst {
+                       rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+               gmac1_rst: gmac1-rst {
+                       rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        headphone {
                hp_det: hp-det {
                        rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;