{
u32 reg, max_preld_size, min_rsvd_size;
+ rtw89_io_pack(rtwdev);
+
max_preld_size = (mac_idx == RTW89_MAC_0 ?
PRELD_B0_ENT_NUM : PRELD_B1_ENT_NUM) * PRELD_AMSDU_SIZE;
reg = mac_idx == RTW89_MAC_0 ?
rtw89_write32_mask(rtwdev, reg, B_AX_B0_PRELD_NXT_TXENDWIN_MASK, PRELD_NEXT_WND);
rtw89_write32_mask(rtwdev, reg, B_AX_B0_PRELD_NXT_RSVMINSZ_MASK, min_rsvd_size);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
return ret;
}
+ rtw89_io_pack(rtwdev);
+
rtw89_write32_set(rtwdev, R_AX_SS_CTRL, B_AX_SS_WARM_INIT_FLG);
rtw89_write32_clr(rtwdev, R_AX_SS_CTRL, B_AX_SS_NONEMPTY_SS2FINFO_EN);
_patch_ss2f_path(rtwdev);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
rtw89_write32(rtwdev, R_AX_ACTION_FWD0, TRXCFG_MPDU_PROC_ACT_FRWD);
rtw89_write32(rtwdev, R_AX_TF_FWD, TRXCFG_MPDU_PROC_TF_FRWD);
rtw89_write32_set(rtwdev, R_AX_MPDU_PROC,
B_AX_APPEND_FCS | B_AX_A_ICV_ERR);
rtw89_write32(rtwdev, R_AX_CUT_AMSDU_CTRL, TRXCFG_MPDU_PROC_CUT_CTRL);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
val = rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL);
/* init clock */
val |= (B_AX_CLK_EN_CGCMP | B_AX_CLK_EN_WAPI | B_AX_CLK_EN_WEP_TKIP);
rtw89_write32_mask(rtwdev, R_AX_SEC_DEBUG1,
B_AX_TX_TIMEOUT_SEL_MASK, AX_TX_TO_VAL);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PREBKF_CFG_1, mac_idx);
if (rtwdev->chip->chip_id == RTL8852C)
rtw89_write32_mask(rtwdev, reg, B_AX_SIFS_MACTXEN_T1_MASK,
SCH_PREBKF_24US);
}
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
for (i = RTW89_MGNT; i <= RTW89_DATA; i++) {
ret = rtw89_mac_typ_fltr_opt_ax(rtwdev, i, RTW89_FWD_TO_HOST,
mac_idx);
rtw89_write16(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_PLCP_HDR_FLTR, mac_idx),
plcp_ftlr);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CCA_CONTROL, mac_idx);
val = rtw89_read32(rtwdev, reg);
val |= (B_AX_TB_CHK_BASIC_NAV | B_AX_TB_CHK_BTCCA |
_patch_dis_resp_chk(rtwdev, mac_idx);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
static int nav_ctrl_init_ax(struct rtw89_dev *rtwdev)
{
+ rtw89_io_pack(rtwdev);
+
rtw89_write32_set(rtwdev, R_AX_WMAC_NAV_CTL, B_AX_WMAC_PLCP_UP_NAV_EN |
B_AX_WMAC_TF_UP_NAV_EN |
B_AX_WMAC_NAV_UPPER_EN);
rtw89_write32_mask(rtwdev, R_AX_WMAC_NAV_CTL, B_AX_WMAC_NAV_UPPER_MASK, NAV_25MS);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
if (ret)
return ret;
+
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_SR_CTRL, mac_idx);
rtw89_write8_clr(rtwdev, reg, B_AX_SR_EN);
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BSSID_SRC_CTRL, mac_idx);
rtw89_write8_set(rtwdev, reg, B_AX_PLCP_SRC_EN);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MAC_LOOPBACK, mac_idx);
rtw89_write32_clr(rtwdev, reg, B_AX_MACLBK_EN);
rtw89_write32_mask(rtwdev, reg, B_AX_TXDFIFO_HIGH_MCS_THRE_MASK, TXDFIFO_HIGH_MCS_THRE);
rtw89_write32_mask(rtwdev, reg, B_AX_TXDFIFO_LOW_MCS_THRE_MASK, TXDFIFO_LOW_MCS_THRE);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_0, mac_idx);
val = rtw89_read32(rtwdev, reg);
val &= ~B_AX_WMAC_SPEC_SIFS_CCK_MASK;
reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->rsc.addr, mac_idx);
rtw89_write32_mask(rtwdev, reg, rrsr->rsc.mask, rrsr->rsc.data);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
if (mac_idx == RTW89_MAC_0)
rst_bacam(rtwdev);
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PLCP_HDR_FLTR, mac_idx);
rtw89_write8_clr(rtwdev, reg, B_AX_VHT_SU_SIGB_CRC_CHK);
+ rtw89_io_unpack(rtwdev);
+
return ret;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) {
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_SIFS_SETTING, mac_idx);
val = rtw89_read32(rtwdev, reg);
B_AX_AMPDU_MAX_LEN_VHT_MASK, 0x3FF80);
}
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
rtw89_write32_set(rtwdev, R_BE_MPDU_PROC, B_BE_APPEND_FCS);
rtw89_write32(rtwdev, R_BE_CUT_AMSDU_CTRL, TRXCFG_MPDU_PROC_CUT_CTRL |
B_BE_CA_CHK_ADDRCAM_EN);
val32 = u32_replace_bits(val32, 1, B_BE_FWD_WLAN_CPU_TYPE_1_MASK);
rtw89_write32(rtwdev, R_BE_DISP_FWD_WLAN_0, val32);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
val32 = rtw89_read32(rtwdev, R_BE_SEC_ENG_CTRL);
val32 |= B_BE_CLK_EN_CGCMP | B_BE_CLK_EN_WAPI | B_BE_CLK_EN_WEP_TKIP |
B_BE_SEC_TX_ENC | B_BE_SEC_RX_DEC |
rtw89_write32_set(rtwdev, R_BE_SEC_MPDU_PROC, B_BE_APPEND_ICV | B_BE_APPEND_MIC);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
u32 reg;
int ret;
- val32 = rtw89_read32(rtwdev, R_BE_MLO_INIT_CTL);
+ rtw89_io_pack(rtwdev);
+ val32 = rtw89_read32(rtwdev, R_BE_MLO_INIT_CTL);
val32 |= B_BE_MLO_TABLE_REINIT;
rtw89_write32(rtwdev, R_BE_MLO_INIT_CTL, val32);
val32 &= ~B_BE_MLO_TABLE_REINIT;
rtw89_write32(rtwdev, R_BE_MLO_INIT_CTL, val32);
+ rtw89_io_unpack(rtwdev);
+
ret = read_poll_timeout_atomic(rtw89_read32, val32,
val32 & B_BE_MLO_TABLE_INIT_DONE,
1, 1000, false, rtwdev, R_BE_MLO_INIT_CTL);
else
reg = R_BE_SS_CTRL_V1;
+ rtw89_io_pack(rtwdev);
+
rtw89_write32_set(rtwdev, reg, B_BE_MLO_HW_CHGLINK_EN);
rtw89_write32_set(rtwdev, R_BE_CMAC_SHARE_ACQCHK_CFG_0, B_BE_R_MACID_ACQ_CHK_EN);
+ rtw89_io_unpack(rtwdev);
+
return ret;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
if (chip->chip_id == RTL8922D) {
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_SCH_EXT_CTRL, mac_idx);
rtw89_write32_set(rtwdev, reg, B_BE_CWCNT_PLUS_MODE);
rtw89_write32_set(rtwdev, reg, B_BE_TX_NAV_RST_EDCA_EN);
}
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
u32 reg;
u32 val;
+ rtw89_io_pack(rtwdev);
+
rtw89_mac_typ_fltr_opt_be(rtwdev, RTW89_MGNT, RTW89_FWD_TO_HOST, mac_idx);
rtw89_mac_typ_fltr_opt_be(rtwdev, RTW89_CTRL, RTW89_FWD_TO_HOST, mac_idx);
rtw89_mac_typ_fltr_opt_be(rtwdev, RTW89_DATA, RTW89_FWD_TO_HOST, mac_idx);
B_BE_LSIG_PARITY_CHK_EN | B_BE_CCK_SIG_CHK | B_BE_CCK_CRC_CHK;
rtw89_write16(rtwdev, reg, val);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
u32 val32;
u32 reg;
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_WMAC_NAV_CTL, mac_idx);
val32 = rtw89_read32(rtwdev, reg);
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_0, mac_idx);
rtw89_write32_set(rtwdev, reg, B_BE_WMAC_MBA_DUR_FORCE);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_RX_SR_CTRL, mac_idx);
rtw89_write8_clr(rtwdev, reg, B_BE_SR_EN | B_BE_SR_CTRL_PLCP_EN);
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_BSSID_SRC_CTRL, mac_idx);
rtw89_write8_set(rtwdev, reg, B_BE_PLCP_SRC_EN);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
struct rtw89_hal *hal = &rtwdev->hal;
u32 reg;
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TB_PPDU_CTRL, mac_idx);
rtw89_write32_clr(rtwdev, reg, B_BE_QOSNULL_UPD_MUEDCA_EN);
rtw89_write32_clr(rtwdev, reg, CLEAR_DTOP_DIS);
}
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_MAC_LOOPBACK, mac_idx);
val32 = rtw89_read32(rtwdev, reg);
val32 = u32_replace_bits(val32, S_BE_MACLBK_PLCP_DLY_DEF,
rtw89_write32_mask(rtwdev, reg, B_BE_RSC_MASK, 1);
}
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
return ret;
}
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_DLK_PROTECT_CTL, mac_idx);
val16 = rtw89_read16(rtwdev, reg);
val16 = u16_replace_bits(val16, TRXCFG_RMAC_DATA_TO, B_BE_RX_DLK_DATA_TIME_MASK);
rtw89_write32_set(rtwdev, reg, B_BE_DIS_CHK_MIN_LEN);
}
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
return ret;
}
+ rtw89_io_pack(rtwdev);
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_RESP_CSI_RESERVED_PAGE, mac_idx);
rtw89_write32_mask(rtwdev, reg, B_BE_CSI_RESERVED_START_PAGE_MASK, qt_cfg.pktid);
rtw89_write32_mask(rtwdev, reg, B_BE_CSI_RESERVED_PAGE_NUM_MASK, qt_cfg.pg_num + 1);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (ret)
return ret;
+ rtw89_io_pack(rtwdev);
+
if (is_qta_poh(rtwdev)) {
reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_SIFS_SETTING, mac_idx);
val32 = rtw89_read32(rtwdev, reg);
B_BE_PRELD_HIQ_P0_EN);
}
+ rtw89_io_unpack(rtwdev);
+
return 0;
}
if (!(chip->chip_id == RTL8922A || rtw89_mac_chk_preload_allow(rtwdev)))
return 0;
+ rtw89_io_pack(rtwdev);
+
max_preld_size = mac_idx == RTW89_MAC_0 ?
PRELD_B0_ENT_NUM : PRELD_B1_ENT_NUM;
if (chip->chip_id == RTL8922D)
val32 |= B_BE_B0_PRELD_FEN;
rtw89_write32(rtwdev, reg, val32);
+ rtw89_io_unpack(rtwdev);
+
return 0;
}