]> git.ipfire.org Git - thirdparty/ipxe.git/commitdiff
[intel] Report any unexpected interrupt causes
authorMichael Brown <mcb30@ipxe.org>
Tue, 21 Apr 2015 14:20:13 +0000 (15:20 +0100)
committerMichael Brown <mcb30@ipxe.org>
Tue, 21 Apr 2015 14:47:16 +0000 (15:47 +0100)
Signed-off-by: Michael Brown <mcb30@ipxe.org>
src/drivers/net/intel.c
src/drivers/net/intel.h

index ffa0276162186f4cf9ecd3d8b427e3a603aa2d08..954025d06e230620cda8dedaa62bd6f729498c99 100644 (file)
@@ -759,6 +759,14 @@ static void intel_poll ( struct net_device *netdev ) {
        if ( icr & INTEL_IRQ_LSC )
                intel_check_link ( netdev );
 
+       /* Check for unexpected interrupts */
+       if ( icr & ~( INTEL_IRQ_TXDW | INTEL_IRQ_TXQE | INTEL_IRQ_LSC |
+                     INTEL_IRQ_RXDMT0 | INTEL_IRQ_RXT0 | INTEL_IRQ_RXO ) ) {
+               DBGC ( intel, "INTEL %p unexpected ICR %08x\n", intel, icr );
+               /* Report as a TX error */
+               netdev_tx_err ( netdev, NULL, -ENOTSUP );
+       }
+
        /* Refill RX ring */
        intel_refill_rx ( intel );
 }
index 0c2929a50e744a7d432695c48ec81bdc28dd7829..5482fb16ccb97e453d7d7a4468f6b8fa8fb340c4 100644 (file)
@@ -91,7 +91,9 @@ enum intel_descriptor_status {
 /** Interrupt Cause Read Register */
 #define INTEL_ICR 0x000c0UL
 #define INTEL_IRQ_TXDW         0x00000001UL    /**< Transmit descriptor done */
+#define INTEL_IRQ_TXQE         0x00000002UL    /**< Transmit queue empty */
 #define INTEL_IRQ_LSC          0x00000004UL    /**< Link status change */
+#define INTEL_IRQ_RXDMT0       0x00000010UL    /**< Receive queue low */
 #define INTEL_IRQ_RXT0         0x00000080UL    /**< Receive timer */
 #define INTEL_IRQ_RXO          0x00000400UL    /**< Receive overrun */