]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
cpufreq: intel_pstate: Check IDA only before MSR_IA32_PERF_CTL writes
authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Tue, 11 Nov 2025 01:08:40 +0000 (17:08 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 24 Nov 2025 09:37:33 +0000 (10:37 +0100)
[ Upstream commit 4b747cc628d8f500d56cf1338280eacc66362ff3 ]

Commit ac4e04d9e378 ("cpufreq: intel_pstate: Unchecked MSR aceess in
legacy mode") introduced a check for feature X86_FEATURE_IDA to verify
turbo mode support. Although this is the correct way to check for turbo
mode support, it causes issues on some platforms that disable turbo
during OS boot, but enable it later [1]. Before adding this feature
check, users were able to get turbo mode frequencies by writing 0 to
/sys/devices/system/cpu/intel_pstate/no_turbo post-boot.

To restore the old behavior on the affected systems while still
addressing the unchecked MSR issue on some Skylake-X systems, check
X86_FEATURE_IDA only immediately before updates of MSR_IA32_PERF_CTL
that may involve setting the Turbo Engage Bit (bit 32).

Fixes: ac4e04d9e378 ("cpufreq: intel_pstate: Unchecked MSR aceess in legacy mode")
Reported-by: Aaron Rainbolt <arainbolt@kfocus.org>
Closes: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2122531 [1]
Tested-by: Aaron Rainbolt <arainbolt@kfocus.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
[ rjw: Subject adjustment, changelog edits ]
Link: https://patch.msgid.link/20251111010840.141490-1-srinivas.pandruvada@linux.intel.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/cpufreq/intel_pstate.c

index fc02a3542f65694ee06b7d883d60817f001eac6b..99c80249fde8877bdae09021dcddf840e04a1d15 100644 (file)
@@ -603,9 +603,6 @@ static bool turbo_is_disabled(void)
 {
        u64 misc_en;
 
-       if (!cpu_feature_enabled(X86_FEATURE_IDA))
-               return true;
-
        rdmsrq(MSR_IA32_MISC_ENABLE, misc_en);
 
        return !!(misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
@@ -2141,7 +2138,8 @@ static u64 atom_get_val(struct cpudata *cpudata, int pstate)
        u32 vid;
 
        val = (u64)pstate << 8;
-       if (READ_ONCE(global.no_turbo) && !READ_ONCE(global.turbo_disabled))
+       if (READ_ONCE(global.no_turbo) && !READ_ONCE(global.turbo_disabled) &&
+           cpu_feature_enabled(X86_FEATURE_IDA))
                val |= (u64)1 << 32;
 
        vid_fp = cpudata->vid.min + mul_fp(
@@ -2306,7 +2304,8 @@ static u64 core_get_val(struct cpudata *cpudata, int pstate)
        u64 val;
 
        val = (u64)pstate << 8;
-       if (READ_ONCE(global.no_turbo) && !READ_ONCE(global.turbo_disabled))
+       if (READ_ONCE(global.no_turbo) && !READ_ONCE(global.turbo_disabled) &&
+           cpu_feature_enabled(X86_FEATURE_IDA))
                val |= (u64)1 << 32;
 
        return val;