]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: rockchip: Fix vdec register blocks order on RK3576
authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Wed, 4 Mar 2026 21:00:42 +0000 (23:00 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 27 Apr 2026 10:29:14 +0000 (12:29 +0200)
When building device trees for the RK3576 based boards, DTC shows the
following complaint:

  rk3576.dtsi:1282.30-1304.5: Warning (simple_bus_reg): /soc/video-codec@27b00000: simple-bus unit address format error, expected "27b00100"

Since the video decoder support for the aforementioned SoC in mainline
driver and devicetrees hasn't been released yet (just landed in
v7.0-rc1), fix the issue by providing the register blocks using the
'link,function,cache' listing, which follows the address-based order as
shown in the vendor's datasheet and, implicitly, ensures the unit
address points to the primary register range.

Fixes: da0de806d8b4 ("arm64: dts: rockchip: Add the vdpu383 Video Decoder on rk3576")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260304-vdec-reg-order-rk3576-v5-3-7006fad42c3a@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3576.dtsi

index 28175d8200d57c0a846a1c13ac3d5fd5421c8177..e12a2a0cfb891621f63e7883e2a5a975d1f377a3 100644 (file)
 
                vdec: video-codec@27b00000 {
                        compatible = "rockchip,rk3576-vdec";
-                       reg = <0x0 0x27b00100 0x0 0x500>,
-                             <0x0 0x27b00000 0x0 0x100>,
+                       reg = <0x0 0x27b00000 0x0 0x100>,
+                             <0x0 0x27b00100 0x0 0x500>,
                              <0x0 0x27b00600 0x0 0x100>;
-                       reg-names = "function", "link", "cache";
+                       reg-names = "link", "function", "cache";
                        interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cru ACLK_RKVDEC_ROOT>, <&cru HCLK_RKVDEC>,
                                 <&cru ACLK_RKVDEC_ROOT_BAK>, <&cru CLK_RKVDEC_CORE>,