KVM: VMX: Ensure vIRR isn't reloaded at odd times when sync'ing PIR

Read each vIRR exactly once when shuffling IRQs from the PIR to the vAPIC
to ensure getting the highest priority IRQ from the chunk doesn't reload
from the vIRR.  In practice, a reload is functionally benign as vcpu->mutex
is held and so IRQs can be consumed, i.e. new IRQs can appear, but existing
IRQs can't disappear.

Link: https://lore.kernel.org/r/20250401163447.846608-4-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index c9de81cc27e1731a5b10a48c6aed896e389e9971..38d793a96686253b31464f38433e02168f930f73 100644 (file)
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -667,7 +667,7 @@ bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr)
        for (i = vec = 0; i <= 7; i++, vec += 32) {
                u32 *p_irr = (u32 *)(regs + APIC_IRR + i * 0x10);
 
-               irr_val = *p_irr;
+               irr_val = READ_ONCE(*p_irr);
                pir_val = READ_ONCE(pir[i]);
 
                if (pir_val) {