]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
dt-bindings: power: qcom,rpmpd: document the SM8750 RPMh Power Domains
authorTaniya Das <quic_tdas@quicinc.com>
Tue, 12 Nov 2024 00:24:43 +0000 (16:24 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 30 Jan 2026 09:27:31 +0000 (10:27 +0100)
[ Upstream commit 134e9d035d830aabd1121bcda89f7ee9a476d3a3 ]

Document the RPMh Power Domains on the SM8750 Platform.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Message-ID: <20241112002444.2802092-2-quic_molvera@quicinc.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Stable-dep-of: 45e1be5ddec9 ("dt-bindings: power: qcom,rpmpd: Add SC8280XP_MXC_AO")
Signed-off-by: Sasha Levin <sashal@kernel.org>
Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
include/dt-bindings/power/qcom-rpmpd.h

index 2ff246cf8b81dd8d1148466ab23529771f925c72..bb01bf5663f37b1ed1e00fe44c9e1b0ae16951ed 100644 (file)
@@ -56,6 +56,7 @@ properties:
           - qcom,sm8450-rpmhpd
           - qcom,sm8550-rpmhpd
           - qcom,sm8650-rpmhpd
+          - qcom,sm8750-rpmhpd
           - qcom,x1e80100-rpmhpd
       - items:
           - enum:
index 7f4e2983a4c573dd75ce4dbef56c1281e5cd482b..ced784a8afc1214a6a08d884db9a9ba5e4e40577 100644 (file)
 /* SDM845 Power Domain performance levels */
 #define RPMH_REGULATOR_LEVEL_RETENTION         16
 #define RPMH_REGULATOR_LEVEL_MIN_SVS           48
+#define RPMH_REGULATOR_LEVEL_LOW_SVS_D3                50
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2                52
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1                56
 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D0                60
 #define RPMH_REGULATOR_LEVEL_TURBO_L1          416
 #define RPMH_REGULATOR_LEVEL_TURBO_L2          432
 #define RPMH_REGULATOR_LEVEL_TURBO_L3          448
+#define RPMH_REGULATOR_LEVEL_TURBO_L4          452
 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO       464
 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR        480