coresight: etm4x: Add context synchronization before enabling trace

According to the software usage PKLXF in Arm ARM (ARM DDI 0487 L.a), a
Context synchronization event is required before enabling the trace
unit.

An ISB is added to meet this requirement, particularly for guarding the
operations in the flow:

  etm4x_allow_trace()
   `> kvm_tracing_set_el1_configuration()
	`> write_sysreg_s(trfcr_while_in_guest, SYS_TRFCR_EL12)

Improved the barrier comments to provide more accurate information.

Fixes: 1ab3bb9df5e3 ("coresight: etm4x: Add necessary synchronization for sysreg access")
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Yeoreun Yun <yeoreum.yun@arm.com>
Tested-by: James Clark <james.clark@linaro.org>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20251111-arm_coresight_power_management_fix-v6-5-f55553b6c8b3@arm.com

diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index c562f82985192ad71e181be1b570c9a2f334f29f..5e707d082537a405e86fc30e28957ef8beec250f 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -446,10 +446,24 @@ static int etm4_enable_trace_unit(struct etmv4_drvdata *drvdata)
                etm4x_relaxed_write32(csa, TRCRSR_TA, TRCRSR);
 
        etm4x_allow_trace(drvdata);
+
+       /*
+        * According to software usage PKLXF in Arm ARM (ARM DDI 0487 L.a),
+        * execute a Context synchronization event to guarantee the trace unit
+        * will observe the new values of the System registers.
+        */
+       if (!csa->io_mem)
+               isb();
+
        /* Enable the trace unit */
        etm4x_relaxed_write32(csa, 1, TRCPRGCTLR);
 
-       /* Synchronize the register updates for sysreg access */
+       /*
+        * As recommended by section 4.3.7 ("Synchronization when using system
+        * instructions to progrom the trace unit") of ARM IHI 0064H.b, the
+        * self-hosted trace analyzer must perform a Context synchronization
+        * event between writing to the TRCPRGCTLR and reading the TRCSTATR.
+        */
        if (!csa->io_mem)
                isb();
 
@@ -931,11 +945,16 @@ static void etm4_disable_trace_unit(struct etmv4_drvdata *drvdata)
         */
        etm4x_prohibit_trace(drvdata);
        /*
-        * Make sure everything completes before disabling, as recommended
-        * by section 7.3.77 ("TRCVICTLR, ViewInst Main Control Register,
-        * SSTATUS") of ARM IHI 0064D
+        * Prevent being speculative at the point of disabling the trace unit,
+        * as recommended by section 7.3.77 ("TRCVICTLR, ViewInst Main Control
+        * Register, SSTATUS") of ARM IHI 0064D
         */
        dsb(sy);
+       /*
+        * According to software usage VKHHY in Arm ARM (ARM DDI 0487 L.a),
+        * execute a Context synchronization event to guarantee no new
+        * program-flow trace is generated.
+        */
        isb();
        /* Trace synchronization barrier, is a nop if not supported */
        tsb_csync();