net/mlx5: Add FDB peer miss rules for satellite PFs

Add satellite PF (SPF) vports to the FDB peer miss rules flow.
Introduce mlx5_esw_for_each_spf_vport() macro to iterate SPF vports.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-12-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
index 40146ec92ec8ec9d397be3c0a66cb4cd3afc8e0c..8a94c38f8566d83053e64bb0a5fb7269b7d0286f 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
@@ -791,6 +791,16 @@ void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
                          MLX5_CAP_GEN_2((esw->dev), ec_vf_vport_base) +\
                          (last) - 1)
 
+/* SPF vport numbers are not contiguous, iterate via the spfs array
+ * and look up each vport in the xarray.
+ */
+#define mlx5_esw_for_each_spf_vport(esw, index, vport)                 \
+       for ((index) = 0;                                               \
+            (index) < (esw)->esw_funcs.num_spfs &&                     \
+            ((vport) = xa_load(&(esw)->vports,                         \
+               (esw)->esw_funcs.spfs[(index)].vport_num));             \
+            (index)++)
+
 #define mlx5_esw_for_each_rep(esw, i, rep) \
        xa_for_each(&((esw)->offloads.vport_reps), i, rep)
 

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
index 59446c444570b7b8b93aa1ba45a2de6b5221735a..355d27934fb4ff6231a95c14559b0fb6b0b7e3ea 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
@@ -1231,6 +1231,19 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,
                flows[peer_vport->index] = flow;
        }
 
+       mlx5_esw_for_each_spf_vport(peer_esw, i, peer_vport) {
+               esw_set_peer_miss_rule_source_port(esw, peer_esw, spec,
+                                                  peer_vport->vport);
+
+               flow = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(esw),
+                                          spec, &flow_act, &dest, 1);
+               if (IS_ERR(flow)) {
+                       err = PTR_ERR(flow);
+                       goto add_ecpf_flow_err;
+               }
+               flows[peer_vport->index] = flow;
+       }
+
        if (mlx5_ecpf_vport_exists(peer_dev)) {
                peer_vport = mlx5_eswitch_get_vport(peer_esw, MLX5_VPORT_ECPF);
                MLX5_SET(fte_match_set_misc, misc, source_port, MLX5_VPORT_ECPF);
@@ -1299,7 +1312,11 @@ add_vf_flow_err:
                mlx5_del_flow_rules(flows[peer_vport->index]);
        }
 add_ecpf_flow_err:
-
+       mlx5_esw_for_each_spf_vport(peer_esw, i, peer_vport) {
+               if (!flows[peer_vport->index])
+                       continue;
+               mlx5_del_flow_rules(flows[peer_vport->index]);
+       }
        if (mlx5_core_is_ecpf_esw_manager(peer_dev) &&
            mlx5_esw_host_functions_enabled(peer_dev)) {
                peer_vport = mlx5_eswitch_get_vport(peer_esw,
@@ -1343,6 +1360,9 @@ static void esw_del_fdb_peer_miss_rules(struct mlx5_eswitch *esw,
                mlx5_del_flow_rules(flows[peer_vport->index]);
        }
 
+       mlx5_esw_for_each_spf_vport(peer_esw, i, peer_vport)
+               mlx5_del_flow_rules(flows[peer_vport->index]);
+
        if (mlx5_core_is_ecpf_esw_manager(peer_dev) &&
            mlx5_esw_host_functions_enabled(peer_dev)) {
                peer_vport = mlx5_eswitch_get_vport(peer_esw,