--- /dev/null
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ /* EMC DVFS OPP table */
+ emc_icc_dvfs_opp_table: opp-table-dvfs0 {
+ compatible = "operating-points-v2";
+
+ opp-40800000-800 {
+ opp-microvolt = <800000 800000 1150000>;
+ opp-hz = /bits/ 64 <40800000>;
+ opp-supported-hw = <0x0003>;
+ };
+
+ opp-68000000-800 {
+ opp-microvolt = <800000 800000 1150000>;
+ opp-hz = /bits/ 64 <68000000>;
+ opp-supported-hw = <0x0003>;
+ };
+
+ opp-102000000-800 {
+ opp-microvolt = <800000 800000 1150000>;
+ opp-hz = /bits/ 64 <102000000>;
+ opp-supported-hw = <0x0003>;
+ };
+
+ opp-204000000-800 {
+ opp-microvolt = <800000 800000 1150000>;
+ opp-hz = /bits/ 64 <204000000>;
+ opp-supported-hw = <0x0007>;
+ opp-suspend;
+ };
+
+ opp-408000000-812 {
+ opp-microvolt = <812000 812000 1150000>;
+ opp-hz = /bits/ 64 <408000000>;
+ opp-supported-hw = <0x0003>;
+ };
+
+ opp-665600000-825 {
+ opp-microvolt = <825000 825000 1150000>;
+ opp-hz = /bits/ 64 <665600000>;
+ opp-supported-hw = <0x0003>;
+ };
+
+ opp-800000000-825 {
+ opp-microvolt = <825000 825000 1150000>;
+ opp-hz = /bits/ 64 <800000000>;
+ opp-supported-hw = <0x0003>;
+ };
+
+ opp-1065600000-837 {
+ opp-microvolt = <837000 837000 1150000>;
+ opp-hz = /bits/ 64 <1065600000>;
+ opp-supported-hw = <0x0003>;
+ };
+
+ opp-1331200000-850 {
+ opp-microvolt = <850000 850000 1150000>;
+ opp-hz = /bits/ 64 <1331200000>;
+ opp-supported-hw = <0x0003>;
+ };
+
+ opp-1600000000-887 {
+ opp-microvolt = <887000 887000 1150000>;
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-supported-hw = <0x0007>;
+ };
+ };
+
+ /* EMC bandwidth OPP table */
+ emc_bw_dfs_opp_table: opp-table-dvfs1 {
+ compatible = "operating-points-v2";
+
+ opp-40800000 {
+ opp-hz = /bits/ 64 <40800000>;
+ opp-supported-hw = <0x0003>;
+ opp-peak-kBps = <652800>;
+ };
+
+ opp-68000000 {
+ opp-hz = /bits/ 64 <68000000>;
+ opp-supported-hw = <0x0003>;
+ opp-peak-kBps = <1088000>;
+ };
+
+ opp-102000000 {
+ opp-hz = /bits/ 64 <102000000>;
+ opp-supported-hw = <0x0003>;
+ opp-peak-kBps = <1632000>;
+ };
+
+ opp-204000000 {
+ opp-hz = /bits/ 64 <204000000>;
+ opp-supported-hw = <0x0007>;
+ opp-peak-kBps = <3264000>;
+ opp-suspend;
+ };
+
+ opp-408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-supported-hw = <0x0003>;
+ opp-peak-kBps = <6528000>;
+ };
+
+ opp-665600000 {
+ opp-hz = /bits/ 64 <665600000>;
+ opp-supported-hw = <0x0003>;
+ opp-peak-kBps = <10649600>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-supported-hw = <0x001F>;
+ opp-peak-kBps = <12800000>;
+ };
+
+ opp-1065600000 {
+ opp-hz = /bits/ 64 <1065600000>;
+ opp-supported-hw = <0x0003>;
+ opp-peak-kBps = <17049600>;
+ };
+
+ opp-1331200000 {
+ opp-hz = /bits/ 64 <1331200000>;
+ opp-supported-hw = <0x0003>;
+ opp-peak-kBps = <21299200>;
+ };
+
+ opp-1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-supported-hw = <0x0007>;
+ opp-peak-kBps = <25600000>;
+ };
+ };
+};
#include <dt-bindings/thermal/tegra124-soctherm.h>
#include <dt-bindings/soc/tegra-pmc.h>
+#include "tegra210-peripherals-opp.dtsi"
+
/ {
compatible = "nvidia,tegra210";
interrupt-parent = <&lic>;
clock-names = "actmon", "emc";
resets = <&tegra_car 119>;
reset-names = "actmon";
+ operating-points-v2 = <&emc_bw_dfs_opp_table>;
+ interconnects = <&mc TEGRA210_MC_MPCORER &emc>;
+ interconnect-names = "cpu-read";
#cooling-cells = <2>;
};
clock-names = "emc";
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
nvidia,memory-controller = <&mc>;
+ operating-points-v2 = <&emc_icc_dvfs_opp_table>;
+
#interconnect-cells = <0>;
#cooling-cells = <2>;
};