re PR target/90724 (ICE with __sync_bool_compare_and_swap with -march=armv8.2-a+sve)

2020-02-18  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	Backport from mainline
	2019-08-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	PR target/90724
	* config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y
	in reg if it fails aarch64_plus_operand predicate.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 812e4f08b32dac747e40d830a84e5c829f1dac9c..967a9fb4539efcfa9e265f7cf7abb24007d2d7de 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2020-02-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+       Backport from mainline
+       2019-08-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+       PR target/90724
+       * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): Force y
+       in reg if it fails aarch64_plus_operand predicate.
+
 2020-02-14 Hongtao Liu  <hongtao.liu@intel.com>
 
        PR target/93724

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 26a28570be9f7a9d99488f2851bbe09228e55a95..b452a53af99dd6e7a7119780aaa51e2a7939c65e 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1910,6 +1910,9 @@ aarch64_gen_compare_reg_maybe_ze (RTX_CODE code, rtx x, rtx y,
        }
     }
 
+  if (!aarch64_plus_operand (y, y_mode))
+    y = force_reg (y_mode, y);
+
   return aarch64_gen_compare_reg (code, x, y);
 }