]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
re PR target/80569 (i686: "shrx" instruction generated in 16-bit mode)
authorUros Bizjak <ubizjak@gmail.com>
Mon, 24 Jul 2017 20:29:02 +0000 (22:29 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Mon, 24 Jul 2017 20:29:02 +0000 (22:29 +0200)
PR target/80569
* config/i386/i386.c (ix86_option_override_internal): Disable
BMI, BMI2 and TBM instructions for -m16.

testsuite/ChangeLog:

PR target/80569
* gcc.target/i386/pr80569.c: New test.

From-SVN: r250486

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr80569.c [new file with mode: 0644]

index 9d4c3b9c925c22b3a153c81808b347bba9c2cb55..2ace2023444df163802700a8de4198efd119523a 100644 (file)
@@ -1,3 +1,9 @@
+2017-07-24  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/80569
+       * config/i386/i386.c (ix86_option_override_internal): Disable
+       BMI, BMI2 and TBM instructions for -m16.
+
 2017-07-18  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/81471
index b1ac232fa49185072a481476e4ccb05fb379dff7..11ab50b697328aa1eba843d5f2a632af2d9abca1 100644 (file)
@@ -4015,6 +4015,12 @@ ix86_option_override_internal (bool main_args_p,
     opts->x_ix86_isa_flags
       |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
 
+  /* Disable BMI, BMI2 and TBM instructions for -m16.  */
+  if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
+    opts->x_ix86_isa_flags
+      &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
+          & ~opts->x_ix86_isa_flags_explicit);
+
   /* Validate -mpreferred-stack-boundary= value or default it to
      PREFERRED_STACK_BOUNDARY_DEFAULT.  */
   ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
index 936b4537475e67df690ecea00a82868f46bed88b..ba0c3fe3ce460aad70fa68b83a6bd9b523542d1f 100644 (file)
@@ -1,3 +1,8 @@
+2017-07-24  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/80569
+       * gcc.target/i386/pr80569.c: New test.
+
 2017-07-18  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/81471
diff --git a/gcc/testsuite/gcc.target/i386/pr80569.c b/gcc/testsuite/gcc.target/i386/pr80569.c
new file mode 100644 (file)
index 0000000..8e11c40
--- /dev/null
@@ -0,0 +1,9 @@
+/* PR target/80569 */
+/* { dg-do assemble } */
+/* { dg-options "-O2 -m16 -march=haswell" } */
+
+void load_kernel(void *setup_addr)
+{
+    unsigned int seg = (unsigned int)setup_addr >> 4;
+    asm("movl %0, %%es" : : "r"(seg));
+}