]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
aarch64: Fix invalid subregs in xorsign [PR118501]
authorRichard Sandiford <richard.sandiford@arm.com>
Mon, 20 Jan 2025 19:52:31 +0000 (19:52 +0000)
committerRichard Sandiford <richard.sandiford@arm.com>
Mon, 20 Jan 2025 19:52:31 +0000 (19:52 +0000)
In the testcase, we try to use xorsign on:

   (subreg:DF (reg:TI R) 8)

i.e. the highpart of the TI.  xorsign wants to take a V2DF
paradoxical subreg of this, which is rightly rejected as a direct
operation.  In cases like this, we need to force the highpart into
a fresh register first.

gcc/
PR target/118501
* config/aarch64/aarch64.md (@xorsign<mode>3): Use
force_lowpart_subreg.

gcc/testsuite/
PR target/118501
* gcc.c-torture/compile/pr118501.c: New test.

gcc/config/aarch64/aarch64.md
gcc/testsuite/gcc.c-torture/compile/pr118501.c [new file with mode: 0644]

index 1b67ccc31dd0d54c984b8685649b8d8914a0ae47..f8d82cee903e6bda65986d388dcbb1c5896c8b1c 100644 (file)
   "TARGET_SIMD"
 {
   rtx tmp = gen_reg_rtx (<VCONQ>mode);
-  rtx op1 = lowpart_subreg (<VCONQ>mode, operands[1], <MODE>mode);
-  rtx op2 = lowpart_subreg (<VCONQ>mode, operands[2], <MODE>mode);
+  rtx op1 = force_lowpart_subreg (<VCONQ>mode, operands[1], <MODE>mode);
+  rtx op2 = force_lowpart_subreg (<VCONQ>mode, operands[2], <MODE>mode);
   emit_insn (gen_xorsign3 (<VCONQ>mode, tmp, op1, op2));
   emit_move_insn (operands[0],
                  lowpart_subreg (<MODE>mode, tmp, <VCONQ>mode));
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr118501.c b/gcc/testsuite/gcc.c-torture/compile/pr118501.c
new file mode 100644 (file)
index 0000000..064b762
--- /dev/null
@@ -0,0 +1,6 @@
+struct s1 {
+  double data[2];
+};
+double h(double t, struct s1 z_) {
+  return z_.data[1] * __builtin_copysign(1.0, t);
+}