drm/amd/pm: Add message control for SMUv13

Initialize smu message control in SMUv13 SOCs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
index c35cbb2aee933016d2a955e28b1cfc165538c896..fabf61e15dbadc20a67bc75762c65c6f69f9dc92 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
@@ -252,6 +252,8 @@ int smu_v13_0_od_edit_dpm_table(struct smu_context *smu,
 int smu_v13_0_set_default_dpm_tables(struct smu_context *smu);
 
 void smu_v13_0_set_smu_mailbox_registers(struct smu_context *smu);
+void smu_v13_0_init_msg_ctl(struct smu_context *smu,
+                           const struct cmn2asic_msg_mapping *message_map);
 
 int smu_v13_0_mode1_reset(struct smu_context *smu);
 

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index e999ee7d053e4e8cd34b0b7672414df8e0b104f8..a3f4b25ac474e6a204d58b89d747cf2e6455ae1f 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -2038,4 +2038,5 @@ void aldebaran_set_ppt_funcs(struct smu_context *smu)
        smu->table_map = aldebaran_table_map;
        smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_ALDE;
        smu_v13_0_set_smu_mailbox_registers(smu);
+       smu_v13_0_init_msg_ctl(smu, aldebaran_message_map);
 }

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index bf00ed3f284860ae6829f63ff293768dcd2411c5..e5996162fd5cdacb05792e65c505fa282d5e002a 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2357,6 +2357,23 @@ void smu_v13_0_set_smu_mailbox_registers(struct smu_context *smu)
        smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
 }
 
+void smu_v13_0_init_msg_ctl(struct smu_context *smu,
+                           const struct cmn2asic_msg_mapping *message_map)
+{
+       struct amdgpu_device *adev = smu->adev;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
+
+       ctl->smu = smu;
+       mutex_init(&ctl->lock);
+       ctl->config.msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
+       ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
+       ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
+       ctl->config.num_arg_regs = 1;
+       ctl->ops = &smu_msg_v1_ops;
+       ctl->default_timeout = adev->usec_timeout * 20;
+       ctl->message_map = message_map;
+}
+
 int smu_v13_0_mode1_reset(struct smu_context *smu)
 {
        int ret = 0;

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 91442e39aa79d580fa94b7f3220a04527a0a59db..128fb68abf705c127ccf639c7caea9e30e13a081 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -3231,6 +3231,7 @@ void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)
        smu->workload_map = smu_v13_0_0_workload_map;
        smu->smc_driver_if_version = SMU13_0_0_DRIVER_IF_VERSION;
        smu_v13_0_0_set_smu_mailbox_registers(smu);
+       smu_v13_0_init_msg_ctl(smu, smu_v13_0_0_message_map);
 
        if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) ==
                IP_VERSION(13, 0, 10) &&

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
index 4a99f585f0710fcd4c93b0e801536bd40ff8f3dc..d8ef38535fe8187ab6b2175feba63e075cc11e75 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
@@ -1133,6 +1133,22 @@ static void smu_v13_0_4_set_smu_mailbox_registers(struct smu_context *smu)
        smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
 }
 
+static void smu_v13_0_4_init_msg_ctl(struct smu_context *smu)
+{
+       struct amdgpu_device *adev = smu->adev;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
+
+       ctl->smu = smu;
+       mutex_init(&ctl->lock);
+       ctl->config.msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
+       ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
+       ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
+       ctl->config.num_arg_regs = 1;
+       ctl->ops = &smu_msg_v1_ops;
+       ctl->default_timeout = adev->usec_timeout * 20;
+       ctl->message_map = smu_v13_0_4_message_map;
+}
+
 void smu_v13_0_4_set_ppt_funcs(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
@@ -1144,8 +1160,11 @@ void smu_v13_0_4_set_ppt_funcs(struct smu_context *smu)
        smu->smc_driver_if_version = SMU13_0_4_DRIVER_IF_VERSION;
        smu->is_apu = true;
 
-       if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 4))
+       if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 4)) {
                smu_v13_0_4_set_smu_mailbox_registers(smu);
-       else
+               smu_v13_0_4_init_msg_ctl(smu);
+       } else {
                smu_v13_0_set_smu_mailbox_registers(smu);
+               smu_v13_0_init_msg_ctl(smu, smu_v13_0_4_message_map);
+       }
 }

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
index f2e3c80ee203cc04b91e2f896398e8335ba1a201..f351880a5e9734d4bc71ddc76c5e72818878578a 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
@@ -1126,6 +1126,22 @@ static const struct pptable_funcs smu_v13_0_5_ppt_funcs = {
        .set_fine_grain_gfx_freq_parameters = smu_v13_0_5_set_fine_grain_gfx_freq_parameters,
 };
 
+static void smu_v13_0_5_init_msg_ctl(struct smu_context *smu)
+{
+       struct amdgpu_device *adev = smu->adev;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
+
+       ctl->smu = smu;
+       mutex_init(&ctl->lock);
+       ctl->config.msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_2);
+       ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_33);
+       ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_34);
+       ctl->config.num_arg_regs = 1;
+       ctl->ops = &smu_msg_v1_ops;
+       ctl->default_timeout = adev->usec_timeout * 20;
+       ctl->message_map = smu_v13_0_5_message_map;
+}
+
 void smu_v13_0_5_set_ppt_funcs(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
@@ -1139,4 +1155,5 @@ void smu_v13_0_5_set_ppt_funcs(struct smu_context *smu)
        smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_34);
        smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_2);
        smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_33);
+       smu_v13_0_5_init_msg_ctl(smu);
 }

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 2c16da1065c88129f9b9489dd92535f436f92b98..a9789f3a23b0b029f20fa571a588eaad81ff47c6 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -3911,6 +3911,7 @@ void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu)
        smu->smc_driver_if_version = SMU_IGNORE_IF_VERSION;
        smu->smc_fw_caps |= SMU_FW_CAP_RAS_PRI;
        smu_v13_0_set_smu_mailbox_registers(smu);
+       smu_v13_0_init_msg_ctl(smu, smu->message_map);
        smu_v13_0_6_set_temp_funcs(smu);
        amdgpu_mca_smu_init_funcs(smu->adev, &smu_v13_0_6_mca_smu_funcs);
        amdgpu_aca_set_smu_funcs(smu->adev, &smu_v13_0_6_aca_smu_funcs);

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index 26f4e0383ace44bb0c25fc82f1a425f036c00758..d8f2059a16317b619f4588ff1519643eac883b40 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -2817,4 +2817,5 @@ void smu_v13_0_7_set_ppt_funcs(struct smu_context *smu)
        smu->workload_map = smu_v13_0_7_workload_map;
        smu->smc_driver_if_version = SMU13_0_7_DRIVER_IF_VERSION;
        smu_v13_0_set_smu_mailbox_registers(smu);
+       smu_v13_0_init_msg_ctl(smu, smu_v13_0_7_message_map);
 }

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index 358fe97ceea31b2e88d2d64445ad93c2e48884d3..79ec2d235a09f276b4582fd9ef9325c8c29ae317 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -1366,4 +1366,5 @@ void yellow_carp_set_ppt_funcs(struct smu_context *smu)
        smu->is_apu = true;
        smu->smc_driver_if_version = SMU13_YELLOW_CARP_DRIVER_IF_VERSION;
        smu_v13_0_set_smu_mailbox_registers(smu);
+       smu_v13_0_init_msg_ctl(smu, yellow_carp_message_map);
 }