backport: re PR rtl-optimization/36438 (gcc ICE compiling code with mmx builtin)

	Backport from mainline:
	2008-06-06  Uros Bizjak <ubizjak@gmail.com>

	PR rtl-optimization/36438
	* cse.c (fold_rtx) [ASHIFT, LSHIFTRT, ASHIFTRT]: Break out early
	for vector shifts with constant scalar shift operands.

testsuite/ChangeLog:

	Backport from mainline:
	2008-06-06  Uros Bizjak <ubizjak@gmail.com>

	PR rtl-optimization/36438
	* gcc.target/i386/pr36438.c

From-SVN: r141849

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 97554189b7e2d99d1248aac8bc1ce7b1f728ba8c..fa409a39dbe22c3511825d0ee4fa774519af4980 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2008-11-13  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline:
+       2008-06-06  Uros Bizjak <ubizjak@gmail.com>
+
+       PR rtl-optimization/36438
+       * cse.c (fold_rtx) [ASHIFT, LSHIFTRT, ASHIFTRT]: Break out early
+       for vector shifts with constant scalar shift operands.
+
 2008-11-12  Jason Merrill  <jason@redhat.com>
 
        PR c++/38007

diff --git a/gcc/cse.c b/gcc/cse.c
index d0cf29719044c8108549a2fe19b3afd57996d6a2..15a2a7af556c73602919d2e8520b5ff0d6d68ecd 100644 (file)
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -4372,6 +4372,11 @@ fold_rtx (rtx x, rtx insn)
                          && exact_log2 (- INTVAL (const_arg1)) >= 0)))
                break;
 
+             /* ??? Vector mode shifts by scalar
+                shift operand are not supported yet.  */
+             if (is_shift && VECTOR_MODE_P (mode))
+                break;
+
              if (is_shift
                  && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode)
                      || INTVAL (inner_const) < 0))

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b37c568c2560dd82d5bc0b7242be14cbc95a2fc5..d61c2b1d74cc5c181e52a3509e0508a6e42f4b8b 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2008-11-13  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline:
+       2008-06-06  Uros Bizjak <ubizjak@gmail.com>
+
+       PR rtl-optimization/36438
+       * gcc.target/i386/pr36438.c
+
 2008-11-13  Jason Merrill  <jason@redhat.com>
 
        PR c++/37932
@@ -17,7 +25,7 @@
 
        PR middle-end/37807
        PR middle-end/37809
-       * gcc/testsuite/gcc.target/i386/mmx-8.c: New test.
+       * gcc.target/i386/mmx-8.c: New test.
 
 2008-10-07  H.J. Lu  <hongjiu.lu@intel.com>
 

diff --git a/gcc/testsuite/gcc.target/i386/pr36438.c b/gcc/testsuite/gcc.target/i386/pr36438.c
new file mode 100644 (file)
index 0000000..73b5b9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr36438.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mmmx" } */
+
+#include <mmintrin.h>
+
+extern __m64 SetS16 (unsigned short, unsigned short,
+                    unsigned short, unsigned short);
+
+void
+foo (__m64 * dest)
+{
+  __m64 mask = SetS16 (0x00FF, 0xFF00, 0x0000, 0x00FF);
+
+  mask = _mm_slli_si64 (mask, 8);
+  mask = _mm_slli_si64 (mask, 8);
+
+  *dest = mask;
+
+  _mm_empty ();
+}