<ref name='gic'/>
<ref name='vmcoreinfo'/>
<ref name='vmgenid'/>
- <optional>
- <ref name='sev'/>
- </optional>
+ <ref name='sev'/>
</interleave>
</element>
</define>
<define name='sev'>
<element name='sev'>
- <element name='cbitpos'>
- <data type='unsignedInt'/>
- </element>
- <element name='reducedPhysBits'>
- <data type='unsignedInt'/>
- </element>
+ <ref name='supported'/>
+ <optional>
+ <element name='cbitpos'>
+ <data type='unsignedInt'/>
+ </element>
+ <element name='reducedPhysBits'>
+ <data type='unsignedInt'/>
+ </element>
+ </optional>
</element>
</define>
virDomainCapsFeatureSEVFormat(virBufferPtr buf,
virSEVCapabilityPtr const sev)
{
- if (!sev)
- return;
- virBufferAddLit(buf, "<sev supported='yes'>\n");
- virBufferAdjustIndent(buf, 2);
- virBufferAsprintf(buf, "<cbitpos>%d</cbitpos>\n", sev->cbitpos);
- virBufferAsprintf(buf, "<reducedPhysBits>%d</reducedPhysBits>\n",
+ if (!sev) {
+ virBufferAddLit(buf, "<sev supported='no'/>\n");
+ } else {
+ virBufferAddLit(buf, "<sev supported='yes'>\n");
+ virBufferAdjustIndent(buf, 2);
+ virBufferAsprintf(buf, "<cbitpos>%d</cbitpos>\n", sev->cbitpos);
+ virBufferAsprintf(buf, "<reducedPhysBits>%d</reducedPhysBits>\n",
sev->reduced_phys_bits);
- virBufferAdjustIndent(buf, -2);
- virBufferAddLit(buf, "</sev>\n");
+ virBufferAdjustIndent(buf, -2);
+ virBufferAddLit(buf, "</sev>\n");
+ }
+
+ return;
}