arm64: dts: qcom: monaco-evk: Add camera AVDD regulators

Define three fixed regulators for camera AVDD rails, each gpio-controlled
with corresponding pinctrl definitions.

Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20260213132058.521474-5-quic_nihalkum@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts
index 0b26cc334a69ad2482a4e9dc2270369813177563..fb687309decd05df4bd259363e19adb52fb42382 100644 (file)
--- a/arch/arm64/boot/dts/qcom/monaco-evk.dts
+++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts
@@ -106,6 +106,48 @@
                };
        };
 
+       vreg_cam0_2p8: vreg-cam0-2p8 {
+               compatible = "regulator-fixed";
+               regulator-name = "vreg_cam0_2p8";
+               regulator-min-microvolt = <2800000>;
+               regulator-max-microvolt = <2800000>;
+               startup-delay-us = <10000>;
+
+               gpio = <&tlmm 73 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+
+               pinctrl-0 = <&cam0_avdd_2v8_en_default>;
+               pinctrl-names = "default";
+       };
+
+       vreg_cam1_2p8: vreg-cam1-2p8 {
+               compatible = "regulator-fixed";
+               regulator-name = "vreg_cam1_2p8";
+               regulator-min-microvolt = <2800000>;
+               regulator-max-microvolt = <2800000>;
+               startup-delay-us = <10000>;
+
+               gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+
+               pinctrl-0 = <&cam1_avdd_2v8_en_default>;
+               pinctrl-names = "default";
+       };
+
+       vreg_cam2_2p8: vreg-cam2-2p8 {
+               compatible = "regulator-fixed";
+               regulator-name = "vreg_cam2_2p8";
+               regulator-min-microvolt = <2800000>;
+               regulator-max-microvolt = <2800000>;
+               startup-delay-us = <10000>;
+
+               gpio = <&tlmm 75 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+
+               pinctrl-0 = <&cam2_avdd_2v8_en_default>;
+               pinctrl-names = "default";
+       };
+
        /* This comes from a PMIC handled within the SAIL domain */
        vreg_s2s: vreg-s2s {
                compatible = "regulator-fixed";
@@ -686,6 +728,27 @@
                bias-pull-up;
        };
 
+       cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
+               pins = "gpio73";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-disable;
+       };
+
+       cam1_avdd_2v8_en_default: cam1-avdd-2v8-en-state {
+               pins = "gpio74";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-disable;
+       };
+
+       cam2_avdd_2v8_en_default: cam2-avdd-2v8-en-state {
+               pins = "gpio75";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-disable;
+       };
+
        qup_i2c15_default: qup-i2c15-state {
                pins = "gpio91", "gpio92";
                function = "qup1_se7";