]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
thermal: renesas: rzg3e: make reset optional
authorCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Thu, 8 Jan 2026 19:52:19 +0000 (21:52 +0200)
committerDaniel Lezcano <daniel.lezcano@linaro.org>
Wed, 21 Jan 2026 18:02:14 +0000 (19:02 +0100)
The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs do not have a
reset line.

Prepare for them by making it optional.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: John Madieu <john.madieu.xa@bp.renesas.com>
Tested-by: John Madieu <john.madieu.xa@bp.renesas.com>
Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Link: https://patch.msgid.link/20260108195223.193531-2-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
drivers/thermal/renesas/rzg3e_thermal.c

index e66d73ca67527787beff161112555c771801d36c..86c10810e5bf524153cd41ef703433661c5b2fd6 100644 (file)
@@ -412,7 +412,7 @@ static int rzg3e_thermal_probe(struct platform_device *pdev)
                                     "Clock rate %lu Hz too low (min %u Hz)\n",
                                     clk_get_rate(clk), TSU_MIN_CLOCK_RATE);
 
-       priv->rstc = devm_reset_control_get_exclusive_deasserted(dev, NULL);
+       priv->rstc = devm_reset_control_get_optional_exclusive_deasserted(dev, NULL);
        if (IS_ERR(priv->rstc))
                return dev_err_probe(dev, PTR_ERR(priv->rstc),
                                     "Failed to get/deassert reset control\n");