clk: mediaTek: mt8365: add clock tree type flags

Add clock tree type flags to the mt8365 clock tree structures. These
will be used later for parent lookup.

Link: https://patch.msgid.link/20260710-mtk-clk-parent-lookup-improvements-v2-14-f3f3a4a28dca@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>

diff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-mt8365.c
index eb94b86622c0e8328f740bcafdb810a7d2814f50..50208ae2fb885e6231a049f66fbad63abb81d488 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8365.c
+++ b/drivers/clk/mediatek/clk-mt8365.c
@@ -79,6 +79,7 @@ static const struct mtk_clk_tree mt8365_apmixed_tree = {
        .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
        .plls = apmixed_plls,
        .num_plls = ARRAY_SIZE(apmixed_plls),
+       .type = MTK_CLK_TREE_APMIXED,
 };
 
 /* topckgen */
@@ -595,6 +596,7 @@ static const struct mtk_clk_tree mt8365_topckgen_tree = {
        .num_fdivs = ARRAY_SIZE(top_divs),
        .num_muxes = ARRAY_SIZE(top_muxes),
        .num_gates = ARRAY_SIZE(top_clk_gates),
+       .type = MTK_CLK_TREE_TOPCKGEN,
 };
 
 /* infracfg */
@@ -792,6 +794,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
        .name = "mt8365-apmixedsys",
        .id = UCLASS_CLK,
        .of_match = mt8365_apmixed_compat,
+       .bind = mtk_common_clk_parent_bind,
        .probe = mt8365_apmixedsys_probe,
        .priv_auto = sizeof(struct mtk_clk_priv),
        .ops = &mtk_clk_apmixedsys_ops,
@@ -802,6 +805,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = {
        .name = "mt8365-topckgen",
        .id = UCLASS_CLK,
        .of_match = mt8365_topckgen_compat,
+       .bind = mtk_common_clk_parent_bind,
        .probe = mt8365_topckgen_probe,
        .priv_auto = sizeof(struct mtk_clk_priv),
        .ops = &mtk_clk_topckgen_ops,