bank->irqtype = 0;
bank->irqinten = 0;
bank->chip.label = bank->name;
- bank->chip.of_gpio_n_cells = 2;
bank->chip.parent = &pdev->dev;
bank->chip.request = ma35_gpio_core_to_request;
bank->chip.direction_input = ma35_gpio_core_direction_in;
.is_generic = true,
};
-static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc *grp,
+static int ma35_pinctrl_parse_groups(struct fwnode_handle *fwnode, struct group_desc *grp,
struct ma35_pinctrl *npctl, u32 index)
{
+ struct device_node *np = to_of_node(fwnode);
struct ma35_pin_setting *pin;
unsigned long *configs;
unsigned int nconfigs;
if (ret)
return ret;
- count = of_property_count_elems_of_size(np, "nuvoton,pins", sizeof(u32));
+ count = fwnode_property_count_u32(fwnode, "nuvoton,pins");
if (!count || count % 3)
return -EINVAL;
grp->grp.name = np->name;
- ret = of_property_read_u32_array(np, "nuvoton,pins", elems, count);
+ ret = fwnode_property_read_u32_array(fwnode, "nuvoton,pins", elems, count);
if (ret)
return -EINVAL;
grp->grp.npins = count / 3;
return 0;
}
-static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinctrl *npctl,
+static int ma35_pinctrl_parse_functions(struct fwnode_handle *fwnode, struct ma35_pinctrl *npctl,
u32 index)
{
- struct device_node *child;
+ struct device_node *np = to_of_node(fwnode);
+ struct fwnode_handle *child;
struct pinfunction *func;
struct group_desc *grp;
static u32 grp_index;
if (!groups)
return -ENOMEM;
- for_each_child_of_node(np, child) {
- groups[i] = child->name;
+ fwnode_for_each_child_node(fwnode, child) {
+ struct device_node *node = to_of_node(child);
+
+ groups[i] = node->name;
grp = &npctl->groups[grp_index++];
ret = ma35_pinctrl_parse_groups(child, grp, npctl, i++);
if (ret) {
- of_node_put(child);
+ fwnode_handle_put(child);
return ret;
}
}
static int ma35_pinctrl_probe_dt(struct platform_device *pdev, struct ma35_pinctrl *npctl)
{
+ struct device *dev = &pdev->dev;
struct fwnode_handle *child;
u32 idx = 0;
int ret;
- device_for_each_child_node(&pdev->dev, child) {
- if (fwnode_property_present(child, "gpio-controller"))
- continue;
+ for_each_gpiochip_node(dev, child) {
npctl->nfunctions++;
npctl->ngroups += of_get_child_count(to_of_node(child));
}
if (!npctl->groups)
return -ENOMEM;
- device_for_each_child_node(&pdev->dev, child) {
- if (fwnode_property_present(child, "gpio-controller"))
- continue;
-
- ret = ma35_pinctrl_parse_functions(to_of_node(child), npctl, idx++);
+ for_each_gpiochip_node(dev, child) {
+ ret = ma35_pinctrl_parse_functions(child, npctl, idx++);
if (ret) {
fwnode_handle_put(child);
dev_err(&pdev->dev, "failed to parse function\n");
npctl->info = info;
npctl->dev = &pdev->dev;
- npctl->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "nuvoton,sys");
+ npctl->regmap = syscon_regmap_lookup_by_phandle(dev_of_node(dev), "nuvoton,sys");
if (IS_ERR(npctl->regmap))
return dev_err_probe(&pdev->dev, PTR_ERR(npctl->regmap),
"No syscfg phandle specified\n");
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mfd/syscon.h>
+#include <linux/mod_devicetable.h>
#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl)
{
int ret = -ENXIO;
- struct resource res;
struct device *dev = pctrl->dev;
struct fwnode_reference_args args;
struct fwnode_handle *child;
int id = 0;
for_each_gpiochip_node(dev, child) {
- struct device_node *np = to_of_node(child);
-
- ret = of_address_to_resource(np, 0, &res);
- if (ret < 0) {
- dev_err(dev, "Resource fail for GPIO bank %u\n", id);
- return ret;
- }
-
- pctrl->gpio_bank[id].base = ioremap(res.start, resource_size(&res));
+ pctrl->gpio_bank[id].base = fwnode_iomap(child, 0);
if (!pctrl->gpio_bank[id].base)
return -EINVAL;
return ret;
}
- ret = irq_of_parse_and_map(np, 0);
+ ret = fwnode_irq_get(child, 0);
if (!ret) {
dev_err(dev, "No IRQ for GPIO bank %u\n", id);
return -EINVAL;