]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
soc: mediatek: mtk-mutex: Add DPI1 SOF/EOF to MT8188 mutex tables
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Wed, 12 Feb 2025 10:00:05 +0000 (11:00 +0100)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thu, 6 Mar 2025 10:54:19 +0000 (11:54 +0100)
MT8188 uses DPI1 to output to the HDMI controller: add the
Start of Frame and End of Frame configuration for the DPI1
IP to the tables to unblock generation and sending of these
signals to the GCE.

Link: https://lore.kernel.org/r/20250212100012.33001-2-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
drivers/soc/mediatek/mtk-mutex.c

index 5250c1d702eb9b2102c9e63b89a90d1282686b68..aaa965d4b050a795b7e5bc93f4ca26bfd352e32e 100644 (file)
 #define MT8188_MUTEX_MOD_DISP1_VPP_MERGE3      23
 #define MT8188_MUTEX_MOD_DISP1_VPP_MERGE4      24
 #define MT8188_MUTEX_MOD_DISP1_DISP_MIXER      30
+#define MT8188_MUTEX_MOD_DISP1_DPI1            38
 #define MT8188_MUTEX_MOD_DISP1_DP_INTF1                39
 
 #define MT8195_MUTEX_MOD_DISP_OVL0             0
 #define MT8188_MUTEX_SOF_DSI0                  1
 #define MT8188_MUTEX_SOF_DP_INTF0              3
 #define MT8188_MUTEX_SOF_DP_INTF1              4
+#define MT8188_MUTEX_SOF_DPI1                  5
 #define MT8195_MUTEX_SOF_DSI0                  1
 #define MT8195_MUTEX_SOF_DSI1                  2
 #define MT8195_MUTEX_SOF_DP_INTF0              3
 #define MT8188_MUTEX_EOF_DSI0                  (MT8188_MUTEX_SOF_DSI0 << 7)
 #define MT8188_MUTEX_EOF_DP_INTF0              (MT8188_MUTEX_SOF_DP_INTF0 << 7)
 #define MT8188_MUTEX_EOF_DP_INTF1              (MT8188_MUTEX_SOF_DP_INTF1 << 7)
+#define MT8188_MUTEX_EOF_DPI1                  (MT8188_MUTEX_SOF_DPI1 << 7)
 #define MT8195_MUTEX_EOF_DSI0                  (MT8195_MUTEX_SOF_DSI0 << 7)
 #define MT8195_MUTEX_EOF_DSI1                  (MT8195_MUTEX_SOF_DSI1 << 7)
 #define MT8195_MUTEX_EOF_DP_INTF0              (MT8195_MUTEX_SOF_DP_INTF0 << 7)
@@ -472,6 +475,7 @@ static const u8 mt8188_mutex_mod[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_PWM0] = MT8188_MUTEX_MOD2_DISP_PWM0,
        [DDP_COMPONENT_DP_INTF0] = MT8188_MUTEX_MOD_DISP_DP_INTF0,
        [DDP_COMPONENT_DP_INTF1] = MT8188_MUTEX_MOD_DISP1_DP_INTF1,
+       [DDP_COMPONENT_DPI1] = MT8188_MUTEX_MOD_DISP1_DPI1,
        [DDP_COMPONENT_ETHDR_MIXER] = MT8188_MUTEX_MOD_DISP1_DISP_MIXER,
        [DDP_COMPONENT_MDP_RDMA0] = MT8188_MUTEX_MOD_DISP1_MDP_RDMA0,
        [DDP_COMPONENT_MDP_RDMA1] = MT8188_MUTEX_MOD_DISP1_MDP_RDMA1,
@@ -686,6 +690,8 @@ static const u16 mt8188_mutex_sof[DDP_MUTEX_SOF_MAX] = {
        [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
        [MUTEX_SOF_DSI0] =
                MT8188_MUTEX_SOF_DSI0 | MT8188_MUTEX_EOF_DSI0,
+       [MUTEX_SOF_DPI1] =
+               MT8188_MUTEX_SOF_DPI1 | MT8188_MUTEX_EOF_DPI1,
        [MUTEX_SOF_DP_INTF0] =
                MT8188_MUTEX_SOF_DP_INTF0 | MT8188_MUTEX_EOF_DP_INTF0,
        [MUTEX_SOF_DP_INTF1] =