drm/msm/dpu: pass master interface to CTL configuration

Active controls require setup of the master interface. Pass the selected
interface to CTL configuration.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/641583/
Link: https://lore.kernel.org/r/20250307-dpu-active-ctl-v3-3-5d20655f10ca@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index da9994a79ca293ec0265680c438835742102db2a..a0ba55ab3c894c200225fe48ec6214ae4135d059 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -60,6 +60,8 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg(
                return;
 
        intf_cfg.intf = phys_enc->hw_intf->idx;
+       if (phys_enc->split_role == ENC_ROLE_MASTER)
+               intf_cfg.intf_master = phys_enc->hw_intf->idx;
        intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_CMD;
        intf_cfg.stream_sel = cmd_enc->stream_sel;
        intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc);

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index abd6600046cb3a91bf88ca240fd9b9c306b0ea2e..232055473ba55998b79dd2e8c752c129bbffbff4 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -298,6 +298,8 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
        if (phys_enc->hw_cdm)
                intf_cfg.cdm = phys_enc->hw_cdm->idx;
        intf_cfg.intf = phys_enc->hw_intf->idx;
+       if (phys_enc->split_role == ENC_ROLE_MASTER)
+               intf_cfg.intf_master = phys_enc->hw_intf->idx;
        intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_VID;
        intf_cfg.stream_sel = 0; /* Don't care value for video mode */
        intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc);