#include "system/cpus.h"
#include "system/hw_accel.h"
#include "system/kvm.h"
+#include "system/whpx.h"
#include "system/runstate.h"
#include "system/address-spaces.h"
#include "hw/i386/apic_internal.h"
return -1;
}
- if (kvm_enabled() && !kvm_irqchip_in_kernel()) {
+ if ((kvm_enabled() && !kvm_irqchip_in_kernel())
+ || (whpx_enabled() && !whpx_irqchip_in_kernel())) {
/*
* KVM without kernel-based TPR access reporting will pass an IP that
* points after the accessing instruction. So we need to look backward
cpu_physical_memory_read(rom_paddr, rom, s->rom_size);
for (pos = 0; pos < s->rom_size - sizeof(vmcall_pattern); pos++) {
- if (kvm_irqchip_in_kernel()) {
+ if (kvm_enabled() && kvm_irqchip_in_kernel()) {
pattern = outl_pattern;
alternates[0] = outl_pattern[7];
alternates[1] = outl_pattern[7];
}
break;
case 1:
- if (kvm_enabled()) {
+ if (kvm_enabled() || (whpx_enabled() && !whpx_irqchip_in_kernel())) {
/*
* Disable triggering instruction in ROM by writing a NOP.
*
* We cannot do this in TCG mode as the reported IP is not
* accurate.
+ *
+ * Oddly enough, KVM increments EIP _before_ the execution
+ * of the instruction is finished.
*/
pause_all_vcpus();
- patch_byte(cpu, env->eip - 2, 0x66);
- patch_byte(cpu, env->eip - 1, 0x90);
+ if (!kvm_enabled()) {
+ patch_byte(cpu, env->eip, 0x66);
+ patch_byte(cpu, env->eip + 1, 0x90);
+ }
+ else {
+ patch_byte(cpu, env->eip - 2, 0x66);
+ patch_byte(cpu, env->eip - 1, 0x90);
+ }
resume_all_vcpus();
}
break;
default:
case 4:
- if (!kvm_irqchip_in_kernel()) {
+ if ((kvm_enabled() && !kvm_irqchip_in_kernel())
+ || (whpx_enabled() && !whpx_irqchip_in_kernel())) {
apic_poll_irq(cpu->apic_state);
}
break;