net: hns3: extend HCLGE_FD_AD_COUNTER_NUM to 8 bits

Currently, HCLGE_FD_AD_COUNTER_NUM has only 7 bits and supports a
maximum of 127 counter_id. However, there are actually scenarios
where the counter_id exceeds 127.

This patch adds an additional bit to HCLGE_FD_AD_QID to ensure
that counter_id greater than 127 are supported.

Signed-off-by: Jijie Shao <shaojijie@huawei.com>
Link: https://patch.msgid.link/20260123094756.3718516-3-shaojijie@huawei.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
index bc333d8710ac1ad012195856bf3a596ceec1a5e3..4ce92ddefcded22550402f7d37ffddd15e9b9142 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
@@ -26,6 +26,7 @@ struct hclge_misc_vector {
 #define HCLGE_TQP_REG_OFFSET           0x80000
 #define HCLGE_TQP_REG_SIZE             0x200
 
+#define HCLGE_FD_COUNTER_MAX_SIZE_DEV_V2       128
 #define HCLGE_TQP_MAX_SIZE_DEV_V2      1024
 #define HCLGE_TQP_EXT_REG_OFFSET       0x100
 
@@ -730,8 +731,8 @@ struct hclge_fd_tcam_config_3_cmd {
 #define HCLGE_FD_AD_QID_L_S            2
 #define HCLGE_FD_AD_QID_L_M            GENMASK(11, 2)
 #define HCLGE_FD_AD_USE_COUNTER_B      12
-#define HCLGE_FD_AD_COUNTER_NUM_S      13
-#define HCLGE_FD_AD_COUNTER_NUM_M      GENMASK(19, 13)
+#define HCLGE_FD_AD_COUNTER_NUM_L_S    13
+#define HCLGE_FD_AD_COUNTER_NUM_L_M    GENMASK(19, 13)
 #define HCLGE_FD_AD_NXT_STEP_B         20
 #define HCLGE_FD_AD_NXT_KEY_S          21
 #define HCLGE_FD_AD_NXT_KEY_M          GENMASK(25, 21)
@@ -742,6 +743,7 @@ struct hclge_fd_tcam_config_3_cmd {
 #define HCLGE_FD_AD_TC_SIZE_S          17
 #define HCLGE_FD_AD_TC_SIZE_M          GENMASK(20, 17)
 #define HCLGE_FD_AD_QID_H_B            21
+#define HCLGE_FD_AD_COUNTER_NUM_H_B    26
 
 struct hclge_fd_ad_config_cmd {
        u8 stage;

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index a90f1a91f9973fc3848bbc3fe494f1a850346bf0..edec994981c7201c5310ee73be7961ea2d8bb366 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -5681,6 +5681,9 @@ static int hclge_fd_ad_config(struct hclge_dev *hdev, u8 stage, int loc,
        }
        hnae3_set_bit(ad_data, HCLGE_FD_AD_QID_H_B,
                      action->queue_id >= HCLGE_TQP_MAX_SIZE_DEV_V2 ? 1 : 0);
+       hnae3_set_bit(ad_data, HCLGE_FD_AD_COUNTER_NUM_H_B,
+                     action->counter_id >= HCLGE_FD_COUNTER_MAX_SIZE_DEV_V2 ?
+                     1 : 0);
        ad_data <<= 32;
        hnae3_set_bit(ad_data, HCLGE_FD_AD_DROP_B, action->drop_packet);
        hnae3_set_bit(ad_data, HCLGE_FD_AD_DIRECT_QID_B,
@@ -5688,8 +5691,8 @@ static int hclge_fd_ad_config(struct hclge_dev *hdev, u8 stage, int loc,
        hnae3_set_field(ad_data, HCLGE_FD_AD_QID_L_M, HCLGE_FD_AD_QID_L_S,
                        action->queue_id);
        hnae3_set_bit(ad_data, HCLGE_FD_AD_USE_COUNTER_B, action->use_counter);
-       hnae3_set_field(ad_data, HCLGE_FD_AD_COUNTER_NUM_M,
-                       HCLGE_FD_AD_COUNTER_NUM_S, action->counter_id);
+       hnae3_set_field(ad_data, HCLGE_FD_AD_COUNTER_NUM_L_M,
+                       HCLGE_FD_AD_COUNTER_NUM_L_S, action->counter_id);
        hnae3_set_bit(ad_data, HCLGE_FD_AD_NXT_STEP_B, action->use_next_stage);
        hnae3_set_field(ad_data, HCLGE_FD_AD_NXT_KEY_M, HCLGE_FD_AD_NXT_KEY_S,
                        action->next_input_key);