backport: re PR target/84899 (ICE: in final_scan_insn_1, at final.c:3139 (error:...

	Backported from mainline
	2018-03-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/84899
	* postreload.c (reload_combine_recognize_pattern): Perform
	INTVAL addition in unsigned HOST_WIDE_INT type to avoid UB and
	truncate_int_for_mode the result for the destination's mode.

	* gcc.dg/pr84899.c: New test.

From-SVN: r261929

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d3d6ec7a6db2208f5d0553569df3ce18b9a67fe6..6ac9e4082516e6a5032420c1465a297f0b08d103 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -3,6 +3,11 @@
        Backported from mainline
        2018-03-16  Jakub Jelinek  <jakub@redhat.com>
 
+       PR target/84899
+       * postreload.c (reload_combine_recognize_pattern): Perform
+       INTVAL addition in unsigned HOST_WIDE_INT type to avoid UB and
+       truncate_int_for_mode the result for the destination's mode.
+
        PR tree-optimization/84841
        * tree-ssa-reassoc.c (INTEGER_CONST_TYPE): Change to 1 << 4 from
        1 << 3.

diff --git a/gcc/postreload.c b/gcc/postreload.c
index e721f2f867da3eb268bc72e3e0f2c5f8686a2fd2..d60875a257b49e1c5893cbe380c2e1790f43578a 100644 (file)
--- a/gcc/postreload.c
+++ b/gcc/postreload.c
@@ -1160,11 +1160,13 @@ reload_combine_recognize_pattern (rtx_insn *insn)
             value in PREV, the constant loading instruction.  */
          validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
          if (reg_state[regno].offset != const0_rtx)
-           validate_change (prev,
-                            &SET_SRC (prev_set),
-                            GEN_INT (INTVAL (SET_SRC (prev_set))
-                                     + INTVAL (reg_state[regno].offset)),
-                            1);
+           {
+             HOST_WIDE_INT c
+               = trunc_int_for_mode (UINTVAL (SET_SRC (prev_set))
+                                     + UINTVAL (reg_state[regno].offset),
+                                     GET_MODE (index_reg));
+             validate_change (prev, &SET_SRC (prev_set), GEN_INT (c), 1);
+           }
 
          /* Now for every use of REG that we have recorded, replace REG
             with REG_SUM.  */

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0a2d4686ff6052ce68688fea61088e1216e7e391..9580923bb6cda3ec1828f4363c5e0963d8fe549e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -3,6 +3,9 @@
        Backported from mainline
        2018-03-16  Jakub Jelinek  <jakub@redhat.com>
 
+       PR target/84899
+       * gcc.dg/pr84899.c: New test.
+
        PR c++/84874
        * g++.dg/cpp1z/desig8.C: New test.
 

diff --git a/gcc/testsuite/gcc.dg/pr84899.c b/gcc/testsuite/gcc.dg/pr84899.c
new file mode 100644 (file)
index 0000000..0706fec
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr84899.c
@@ -0,0 +1,12 @@
+/* PR target/84899 */
+/* { dg-do compile } */
+/* { dg-options "-O -funroll-all-loops -fno-move-loop-invariants" } */
+
+void
+foo (int x)
+{
+  int a = 1 / x, b = 0;
+
+  while ((a + b + 1) < x)
+    b = __INT_MAX__;
+}