iio: temp: max31865: Fix alignment for DMA safety

[ Upstream commit ecdef5b8317cdf18acb46223e087f04a226fa619 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition

Fixes: e112dc4e18ea ("iio: temperature: Add MAX31865 RTD Support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Navin Sankar Velliangiri <navin@linumiz.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-92-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/iio/temperature/max31865.c b/drivers/iio/temperature/max31865.c
index 86c3f3509a26ff0b74614e2e88a10f1fa6640bc5..f0079e51d8d2de71f8612934c7a990f755c322b6 100644 (file)
--- a/drivers/iio/temperature/max31865.c
+++ b/drivers/iio/temperature/max31865.c
@@ -53,7 +53,7 @@ struct max31865_data {
        struct mutex lock;
        bool filter_50hz;
        bool three_wire;
-       u8 buf[2] ____cacheline_aligned;
+       u8 buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int max31865_read(struct max31865_data *data, u8 reg,