arm: dts: k3-j721s2*: Enable OSPI1 with 32-bit address mappings for R5 SPL

The R5 SPL requires 32-bit address mappings for OSPI1(QSPI) access.
Override the OSPI1 node with appropriate 32-bit register ranges to
enable proper address translation on the 32-bit R5 core, while
preserving 64-bit mappings for A72 cores. While at it, remove the
disabled status override for ospi1 node to support booting from
qspi.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>

diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index 54eb9b4072c789613e7a8a284ae8aca803b0a14b..8d51fea72b8179ea068e50dcb14db420305d320a 100644 (file)
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -107,10 +107,6 @@
        };
 };
 
-&ospi1 {
-       status = "disabled";
-};
-
 &usbss0 {
        bootph-all;
 };

diff --git a/arch/arm/dts/k3-j721s2-r5.dtsi b/arch/arm/dts/k3-j721s2-r5.dtsi
index c1c12e217d26b545af261fa6cd4cc688182dbd2e..7d4a6dc5301395662f9fe8c1b45ab886f601b61c 100644 (file)
--- a/arch/arm/dts/k3-j721s2-r5.dtsi
+++ b/arch/arm/dts/k3-j721s2-r5.dtsi
@@ -90,6 +90,11 @@
                          <0x0 0x50000000 0x0 0x8000000>;
 };
 
+&ospi1 {
+       reg = <0x0 0x47050000 0x0 0x100>,
+             <0x0 0x58000000 0x0 0x8000000>;
+};
+
 &fss {
        /* fss node has 64 bit address regions mapped to it and since the ospi
         * nodes is being override, override the fss node ranges as well