of the host. Remove parameter.
git-svn-id: svn://svn.valgrind.org/vex/trunk@3063
p = doAMode_M(p, fake(4), i->Ain.EvCheck.amFailAddr);
vassert(p - p0 == 8); /* also ensures that 0x03 offset above is ok */
/* And crosscheck .. */
- vassert(evCheckSzB_AMD64(endness_host) == 8);
+ vassert(evCheckSzB_AMD64() == 8);
goto done;
}
/* How big is an event check? See case for Ain_EvCheck in
emit_AMD64Instr just above. That crosschecks what this returns, so
we can tell if we're inconsistent. */
-Int evCheckSzB_AMD64 ( VexEndness endness_host )
+Int evCheckSzB_AMD64 (void)
{
return 8;
}
and so assumes that they are both <= 128, and so can use the short
offset encoding. This is all checked with assertions, so in the
worst case we will merely assert at startup. */
-extern Int evCheckSzB_AMD64 ( VexEndness endness_host );
+extern Int evCheckSzB_AMD64 (void);
/* Perform a chaining and unchaining of an XDirect jump. */
extern VexInvalRange chainXDirect_AMD64 ( VexEndness endness_host,
/* nofail: */
/* Crosscheck */
- vassert(evCheckSzB_ARM64(endness_host) == (UChar*)p - (UChar*)p0);
+ vassert(evCheckSzB_ARM64() == (UChar*)p - (UChar*)p0);
goto done;
}
/* How big is an event check? See case for ARM64in_EvCheck in
emit_ARM64Instr just above. That crosschecks what this returns, so
we can tell if we're inconsistent. */
-Int evCheckSzB_ARM64 ( VexEndness endness_host )
+Int evCheckSzB_ARM64 (void)
{
return 24;
}
/* How big is an event check? This is kind of a kludge because it
depends on the offsets of host_EvC_FAILADDR and
host_EvC_COUNTER. */
-extern Int evCheckSzB_ARM64 ( VexEndness endness_host );
+extern Int evCheckSzB_ARM64 (void);
/* Perform a chaining and unchaining of an XDirect jump. */
extern VexInvalRange chainXDirect_ARM64 ( VexEndness endness_host,
/* nofail: */
/* Crosscheck */
- vassert(evCheckSzB_ARM(endness_host) == (UChar*)p - (UChar*)p0);
+ vassert(evCheckSzB_ARM() == (UChar*)p - (UChar*)p0);
goto done;
}
/* How big is an event check? See case for ARMin_EvCheck in
emit_ARMInstr just above. That crosschecks what this returns, so
we can tell if we're inconsistent. */
-Int evCheckSzB_ARM ( VexEndness endness_host )
+Int evCheckSzB_ARM (void)
{
return 24;
}
/* How big is an event check? This is kind of a kludge because it
depends on the offsets of host_EvC_FAILADDR and
host_EvC_COUNTER. */
-extern Int evCheckSzB_ARM ( VexEndness endness_host );
+extern Int evCheckSzB_ARM (void);
/* Perform a chaining and unchaining of an XDirect jump. */
extern VexInvalRange chainXDirect_ARM ( VexEndness endness_host,
/* nofail: */
/* Crosscheck */
- vassert(evCheckSzB_MIPS(endness_host) == (UChar*)p - (UChar*)p0);
+ vassert(evCheckSzB_MIPS() == (UChar*)p - (UChar*)p0);
goto done;
}
/* How big is an event check? See case for Min_EvCheck in
emit_MIPSInstr just above. That crosschecks what this returns, so
we can tell if we're inconsistent. */
-Int evCheckSzB_MIPS ( VexEndness endness_host )
+Int evCheckSzB_MIPS (void)
{
UInt kInstrSize = 4;
return 7*kInstrSize;
and so assumes that they are both <= 128, and so can use the short
offset encoding. This is all checked with assertions, so in the
worst case we will merely assert at startup. */
-extern Int evCheckSzB_MIPS ( VexEndness endness_host );
+extern Int evCheckSzB_MIPS (void);
/* Perform a chaining and unchaining of an XDirect jump. */
extern VexInvalRange chainXDirect_MIPS ( VexEndness endness_host,
/* nofail: */
/* Crosscheck */
- vassert(evCheckSzB_PPC(endness_host) == (UChar*)p - (UChar*)p0);
+ vassert(evCheckSzB_PPC() == (UChar*)p - (UChar*)p0);
goto done;
}
/* How big is an event check? See case for Pin_EvCheck in
emit_PPCInstr just above. That crosschecks what this returns, so
we can tell if we're inconsistent. */
-Int evCheckSzB_PPC ( VexEndness endness_host )
+Int evCheckSzB_PPC (void)
{
return 28;
}
/* How big is an event check? This is kind of a kludge because it
depends on the offsets of host_EvC_FAILADDR and
host_EvC_COUNTER. */
-extern Int evCheckSzB_PPC ( VexEndness endness_host );
+extern Int evCheckSzB_PPC (void);
/* Perform a chaining and unchaining of an XDirect jump. */
extern VexInvalRange chainXDirect_PPC ( VexEndness endness_host,
/* Make sure the size of the generated code is identical to the size
returned by evCheckSzB_S390 */
- vassert(evCheckSzB_S390(endness_host) == code_end - code_begin);
+ vassert(evCheckSzB_S390() == code_end - code_begin);
return buf;
}
/* Return the number of bytes emitted for an S390_INSN_EVCHECK.
See s390_insn_evcheck_emit */
Int
-evCheckSzB_S390(VexEndness endness_host)
+evCheckSzB_S390(void)
{
return s390_host_has_gie ? 18 : 24;
}
const VexAbiInfo *, Int, Int, Bool, Bool, Addr);
/* Return the number of bytes of code needed for an event check */
-Int evCheckSzB_S390(VexEndness endness_host);
+Int evCheckSzB_S390(void);
/* Perform a chaining and unchaining of an XDirect jump. */
VexInvalRange chainXDirect_S390(VexEndness endness_host,
p = doAMode_M(p, fake(4), i->Xin.EvCheck.amFailAddr);
vassert(p - p0 == 8); /* also ensures that 0x03 offset above is ok */
/* And crosscheck .. */
- vassert(evCheckSzB_X86(endness_host) == 8);
+ vassert(evCheckSzB_X86() == 8);
goto done;
}
/* How big is an event check? See case for Xin_EvCheck in
emit_X86Instr just above. That crosschecks what this returns, so
we can tell if we're inconsistent. */
-Int evCheckSzB_X86 ( VexEndness endness_host )
+Int evCheckSzB_X86 (void)
{
return 8;
}
and so assumes that they are both <= 128, and so can use the short
offset encoding. This is all checked with assertions, so in the
worst case we will merely assert at startup. */
-extern Int evCheckSzB_X86 ( VexEndness endness_host );
+extern Int evCheckSzB_X86 (void);
/* Perform a chaining and unchaining of an XDirect jump. */
extern VexInvalRange chainXDirect_X86 ( VexEndness endness_host,
}
}
-Int LibVEX_evCheckSzB ( VexArch arch_host,
- VexEndness endness_host )
+Int LibVEX_evCheckSzB ( VexArch arch_host )
{
static Int cached = 0; /* DO NOT MAKE NON-STATIC */
if (UNLIKELY(cached == 0)) {
switch (arch_host) {
case VexArchX86:
- cached = evCheckSzB_X86(endness_host); break;
+ cached = evCheckSzB_X86(); break;
case VexArchAMD64:
- cached = evCheckSzB_AMD64(endness_host); break;
+ cached = evCheckSzB_AMD64(); break;
case VexArchARM:
- cached = evCheckSzB_ARM(endness_host); break;
+ cached = evCheckSzB_ARM(); break;
case VexArchARM64:
- cached = evCheckSzB_ARM64(endness_host); break;
+ cached = evCheckSzB_ARM64(); break;
case VexArchS390X:
- cached = evCheckSzB_S390(endness_host); break;
+ cached = evCheckSzB_S390(); break;
case VexArchPPC32:
case VexArchPPC64:
- cached = evCheckSzB_PPC(endness_host); break;
+ cached = evCheckSzB_PPC(); break;
case VexArchMIPS32:
case VexArchMIPS64:
- cached = evCheckSzB_MIPS(endness_host); break;
+ cached = evCheckSzB_MIPS(); break;
default:
vassert(0);
}
calculate the fast entry point address if the slow entry point
address is known (the usual case), or vice versa. */
extern
-Int LibVEX_evCheckSzB ( VexArch arch_host,
- VexEndness endness_host );
+Int LibVEX_evCheckSzB ( VexArch arch_host );
/* Patch the counter location into an existing ProfInc point. The