--- /dev/null
+From cc4f433b14e05eaa4a98fd677b836e9229422387 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 28 Jan 2026 20:51:08 -0500
+Subject: drm/amdgpu/gfx10: fix wptr reset in KGQ init
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit cc4f433b14e05eaa4a98fd677b836e9229422387 upstream.
+
+wptr is a 64 bit value and we need to update the
+full value, not just 32 bits. Align with what we
+already do for KCQs.
+
+Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
+Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit e80b1d1aa1073230b6c25a1a72e88f37e425ccda)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+@@ -6584,7 +6584,7 @@ static int gfx_v10_0_gfx_init_queue(stru
+ memcpy(mqd, adev->gfx.me.mqd_backup[mqd_idx], sizeof(*mqd));
+ /* reset the ring */
+ ring->wptr = 0;
+- *ring->wptr_cpu_addr = 0;
++ atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);
+ amdgpu_ring_clear_ring(ring);
+ #ifdef BRING_UP_DEBUG
+ mutex_lock(&adev->srbm_mutex);
--- /dev/null
+From b1f810471c6a6bd349f7f9f2f2fed96082056d46 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 28 Jan 2026 18:09:03 -0500
+Subject: drm/amdgpu/gfx11: fix wptr reset in KGQ init
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit b1f810471c6a6bd349f7f9f2f2fed96082056d46 upstream.
+
+wptr is a 64 bit value and we need to update the
+full value, not just 32 bits. Align with what we
+already do for KCQs.
+
+Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
+Reviewed-by: Jesse Zhang <jesse.zhang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 1f16866bdb1daed7a80ca79ae2837a9832a74fbc)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+@@ -3716,7 +3716,7 @@ static int gfx_v11_0_gfx_init_queue(stru
+ memcpy(mqd, adev->gfx.me.mqd_backup[mqd_idx], sizeof(*mqd));
+ /* reset the ring */
+ ring->wptr = 0;
+- *ring->wptr_cpu_addr = 0;
++ atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);
+ amdgpu_ring_clear_ring(ring);
+ #ifdef BRING_UP_DEBUG
+ mutex_lock(&adev->srbm_mutex);
--- /dev/null
+From e7fbff9e7622a00c2b53cb14df481916f0019742 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 16 Jan 2026 17:33:05 -0500
+Subject: drm/amdgpu/soc21: fix xclk for APUs
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit e7fbff9e7622a00c2b53cb14df481916f0019742 upstream.
+
+The reference clock is supposed to be 100Mhz, but it
+appears to actually be slightly lower (99.81Mhz).
+
+Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14451
+Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 637fee3954d4bd509ea9d95ad1780fc174489860)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/soc21.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
+@@ -202,7 +202,13 @@ static u32 soc21_get_config_memsize(stru
+
+ static u32 soc21_get_xclk(struct amdgpu_device *adev)
+ {
+- return adev->clock.spll.reference_freq;
++ u32 reference_clock = adev->clock.spll.reference_freq;
++
++ /* reference clock is actually 99.81 Mhz rather than 100 Mhz */
++ if ((adev->flags & AMD_IS_APU) && reference_clock == 10000)
++ return 9981;
++
++ return reference_clock;
+ }
+
+
+++ /dev/null
-From 4f0d22ec60cee420125f4055af76caa0f373a3fe Mon Sep 17 00:00:00 2001
-From: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
-Date: Mon, 26 Jan 2026 14:56:27 +0100
-Subject: pinctrl: lpass-lpi: implement .get_direction() for the GPIO driver
-
-From: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
-
-commit 4f0d22ec60cee420125f4055af76caa0f373a3fe upstream.
-
-GPIO controller driver should typically implement the .get_direction()
-callback as GPIOLIB internals may try to use it to determine the state
-of a pin. Add it for the LPASS LPI driver.
-
-Reported-by: Abel Vesa <abelvesa@kernel.org>
-Cc: stable@vger.kernel.org
-Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
-Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
-Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
-Tested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> # X1E CRD
-Tested-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
-Signed-off-by: Linus Walleij <linusw@kernel.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
---- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
-+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
-@@ -248,6 +248,22 @@ static const struct pinconf_ops lpi_gpio
- .pin_config_group_set = lpi_config_set,
- };
-
-+static int lpi_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
-+{
-+ unsigned long config = pinconf_to_config_packed(PIN_CONFIG_LEVEL, 0);
-+ struct lpi_pinctrl *state = gpiochip_get_data(chip);
-+ unsigned long arg;
-+ int ret;
-+
-+ ret = lpi_config_get(state->ctrl, pin, &config);
-+ if (ret)
-+ return ret;
-+
-+ arg = pinconf_to_config_argument(config);
-+
-+ return arg ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
-+}
-+
- static int lpi_gpio_direction_input(struct gpio_chip *chip, unsigned int pin)
- {
- struct lpi_pinctrl *state = gpiochip_get_data(chip);
-@@ -346,6 +362,7 @@ static void lpi_gpio_dbg_show(struct seq
- #endif
-
- static const struct gpio_chip lpi_gpio_template = {
-+ .get_direction = lpi_gpio_get_direction,
- .direction_input = lpi_gpio_direction_input,
- .direction_output = lpi_gpio_direction_output,
- .get = lpi_gpio_get,
--- /dev/null
+From 5157c328edb35bac05ce77da473c3209d20e0bbb Mon Sep 17 00:00:00 2001
+From: Tamir Duberstein <tamird@kernel.org>
+Date: Wed, 23 Jul 2025 11:39:40 -0400
+Subject: scripts: generate_rust_analyzer: Add compiler_builtins -> core dep
+
+From: Tamir Duberstein <tamird@kernel.org>
+
+commit 5157c328edb35bac05ce77da473c3209d20e0bbb upstream.
+
+Add a dependency edge from `compiler_builtins` to `core` to
+`scripts/generate_rust_analyzer.py` to match `rust/Makefile`. This has
+been incorrect since commit 8c4555ccc55c ("scripts: add
+`generate_rust_analyzer.py`")
+
+Signed-off-by: Tamir Duberstein <tamird@kernel.org>
+Reviewed-by: Jesung Yang <y.j3ms.n@gmail.com>
+Acked-by: Benno Lossin <lossin@kernel.org>
+Fixes: 8c4555ccc55c ("scripts: add `generate_rust_analyzer.py`")
+Cc: stable@vger.kernel.org
+Link: https://patch.msgid.link/20250723-rust-analyzer-pin-init-v1-1-3c6956173c78@kernel.org
+Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ scripts/generate_rust_analyzer.py | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/scripts/generate_rust_analyzer.py
++++ b/scripts/generate_rust_analyzer.py
+@@ -73,7 +73,7 @@ def generate_crates(srctree, objtree, sy
+ append_crate(
+ "compiler_builtins",
+ srctree / "rust" / "compiler_builtins.rs",
+- [],
++ ["core"],
+ )
+
+ append_crate(
asoc-intel-sof_es8336-fix-headphone-gpio-logic-inver.patch
gpiolib-acpi-use-bit_ull-for-u64-mask-in-address-spa.patch
dma-pool-distinguish-between-missing-and-exhausted-a.patch
-pinctrl-lpass-lpi-implement-.get_direction-for-the-gpio-driver.patch
pinctrl-meson-mark-the-gpio-controller-as-sleeping.patch
riscv-compat-fix-compat_uts_machine-definition.patch
asoc-fsl-imx-card-do-not-force-slot-width-to-sample-width.patch
efivarfs-fix-error-propagation-in-efivar_entry_get.patch
mptcp-only-reset-subflow-errors-when-propagated.patch
flex_proportions-make-fprop_new_period-hardirq-safe.patch
+scripts-generate_rust_analyzer-add-compiler_builtins-core-dep.patch
+drm-amdgpu-soc21-fix-xclk-for-apus.patch
+drm-amdgpu-gfx10-fix-wptr-reset-in-kgq-init.patch
+drm-amdgpu-gfx11-fix-wptr-reset-in-kgq-init.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
