arm64: dts: qcom: sm8650: correct MDSS interconnects

commit 9fa33cbca3d2842f1f47ed4e5f6574e611dae32b upstream.

SM8650 lists two interconnects for the display subsystem, mdp0-mem
(between MDP and LLCC) and mdp1-mem (between LLCC and EBI, memory).
The second interconnect is a misuse. mdpN-mem paths should be used for
several outboud MDP interconnects rather than the path between LLCC and
memory. This kind of misuse can result in bandwidth underflows, possibly
degrading picture quality as the required memory bandwidth is divided
between all mdpN-mem paths (and LLCC-EBI should not be a part of such
division).

Drop the second path and use direct MDP-EBI path for mdp0-mem until we
support separate MDP-LLCC and LLCC-EBI paths.

Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes")
Cc: stable@kernel.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241026-fix-sm8x50-mdp-icc-v2-2-fd8ddf755acc@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 974696690e99bc2a1f954b40e14a37e57f1f1e76..416cfb71878a5febfb06a4534d2b52c00385aaf9 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -3603,11 +3603,8 @@
                        resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
 
                        interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS
-                                        &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS>,
-                                       <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS
                                         &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
-                       interconnect-names = "mdp0-mem",
-                                            "mdp1-mem";
+                       interconnect-names = "mdp0-mem";
 
                        power-domains = <&dispcc MDSS_GDSC>;