drm/msm/a2xx: fix pixel shader start on A225

A225 has a different PixelShader start address, write correct address
while initializing GPU.

Fixes: 21af872cd8c6 ("drm/msm/adreno: add a2xx")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/689906/
Message-ID: <20251121-a225-v1-1-a1bab651d186@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
index 1b1ee14b65cf03080372d46c9dc0e4c971f36cf3..f6e48bb8cc69ee588661a26c666c852db0ecce8c 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
@@ -77,7 +77,10 @@ static bool a2xx_me_init(struct msm_gpu *gpu)
 
        /* Vertex and Pixel Shader Start Addresses in instructions
         * (3 DWORDS per instruction) */
-       OUT_RING(ring, 0x80000180);
+       if (adreno_is_a225(adreno_gpu))
+               OUT_RING(ring, 0x80000300);
+       else
+               OUT_RING(ring, 0x80000180);
        /* Maximum Contexts */
        OUT_RING(ring, 0x00000001);
        /* Write Confirm Interval and The CP will wait the