ASoC: fsl_asrc: Add support for i.MX952 platform

Add a compatible string, clock mapping table and enable the option
'start_before_dma' to support ASRC on the i.MX952 platform.

The clock mapping table is to map the clock sources on i.MX952 to the
clock ids in the driver, the clock ids are for all the clock sources on
all supported platforms.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260206014805.3897764-4-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index 2fe25667c888e087bd4138f710fd1d809928267f..5fda9b647c7049a85c42845433773defb377a6a8 100644 (file)
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -106,6 +106,12 @@ static unsigned char clk_map_imx8qxp[2][ASRC_CLK_MAP_LEN] = {
        },
 };
 
+static unsigned char clk_map_imx952[ASRC_CLK_MAP_LEN] = {
+       0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0x0,
+       0x0, 0x1, 0x2, 0x3, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0x4, 0x5, 0x6, 0x8, 0xf, 0xf,
+       0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0x7, 0x9, 0xa, 0xb, 0xc, 0xd, 0xf, 0xf, 0xf, 0xf,
+};
+
 /*
  * According to RM, the divider range is 1 ~ 8,
  * prescaler is power of 2 from 1 ~ 128.
@@ -1337,6 +1343,9 @@ static int fsl_asrc_probe(struct platform_device *pdev)
                        asrc_priv->clk_map[IN] = clk_map_imx8qxp[map_idx];
                        asrc_priv->clk_map[OUT] = clk_map_imx8qxp[map_idx];
                }
+       } else if (of_device_is_compatible(np, "fsl,imx952-asrc")) {
+               asrc_priv->clk_map[IN] = clk_map_imx952;
+               asrc_priv->clk_map[OUT] = clk_map_imx952;
        }
 
        asrc->channel_avail = 10;
@@ -1575,11 +1584,18 @@ static const struct fsl_asrc_soc_data fsl_asrc_imx8qxp_data = {
        .channel_bits = 4,
 };
 
+static const struct fsl_asrc_soc_data fsl_asrc_imx952_data = {
+       .use_edma = true,
+       .channel_bits = 4,
+       .start_before_dma = true,
+};
+
 static const struct of_device_id fsl_asrc_ids[] = {
        { .compatible = "fsl,imx35-asrc", .data = &fsl_asrc_imx35_data },
        { .compatible = "fsl,imx53-asrc", .data = &fsl_asrc_imx53_data },
        { .compatible = "fsl,imx8qm-asrc", .data = &fsl_asrc_imx8qm_data },
        { .compatible = "fsl,imx8qxp-asrc", .data = &fsl_asrc_imx8qxp_data },
+       { .compatible = "fsl,imx952-asrc", .data = &fsl_asrc_imx952_data },
        {}
 };
 MODULE_DEVICE_TABLE(of, fsl_asrc_ids);

diff --git a/sound/soc/fsl/fsl_asrc.h b/sound/soc/fsl/fsl_asrc.h
index 60b6865ca95226458569daa4ee7334af61d46014..7a81366a0ee496700f8553389d8f828a71d936f3 100644 (file)
--- a/sound/soc/fsl/fsl_asrc.h
+++ b/sound/soc/fsl/fsl_asrc.h
@@ -326,6 +326,13 @@ enum asrc_inclk {
        INCLK_SAI6_TX_BCLK     = 0x22,
        INCLK_HDMI_RX_SAI0_RX_BCLK     = 0x24,
        INCLK_HDMI_TX_SAI0_TX_BCLK     = 0x25,
+
+       INCLK_SAI2_TX_BCLK      = 0x26,
+       INCLK_SAI3_TX_BCLK      = 0x27,
+       INCLK_SAI4_RX_BCLK      = 0x28,
+       INCLK_SAI4_TX_BCLK      = 0x29,
+       INCLK_SAI5_RX_BCLK      = 0x2a,
+       INCLK_SAI5_TX_BCLK      = 0x2b,
 };
 
 enum asrc_outclk {
@@ -366,6 +373,13 @@ enum asrc_outclk {
        OUTCLK_SAI6_TX_BCLK     = 0x22,
        OUTCLK_HDMI_RX_SAI0_RX_BCLK     = 0x24,
        OUTCLK_HDMI_TX_SAI0_TX_BCLK     = 0x25,
+
+       OUTCLK_SAI2_TX_BCLK     = 0x26,
+       OUTCLK_SAI3_TX_BCLK     = 0x27,
+       OUTCLK_SAI4_RX_BCLK     = 0x28,
+       OUTCLK_SAI4_TX_BCLK     = 0x29,
+       OUTCLK_SAI5_RX_BCLK     = 0x2a,
+       OUTCLK_SAI5_TX_BCLK     = 0x2b,
 };
 
 #define ASRC_CLK_MAX_NUM       16