arm64: dts: qcom: msm8953: Add interconnects

Add the nodes for the bimc, pcnoc, snoc and snoc_mm. And wire up the
interconnects where applicable.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: Prepare patch for upstream submission]
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250420-msm8953-interconnect-v2-2-828715dcb674@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index d18a5923853587f775a402f3a650666f0f6206aa..273e79fb75695af1fd7a6f77273b95fe3b913fac 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -5,6 +5,8 @@
 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interconnect/qcom,msm8953.h>
+#include <dt-bindings/interconnect/qcom,rpm-icc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,apr.h>
@@ -45,6 +47,8 @@
                        reg = <0x0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
+                       interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &bimc SLV_EBI RPM_ACTIVE_TAG>;
                        next-level-cache = <&l2_0>;
                        #cooling-cells = <2>;
                };
@@ -55,6 +59,8 @@
                        reg = <0x1>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
+                       interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &bimc SLV_EBI RPM_ACTIVE_TAG>;
                        next-level-cache = <&l2_0>;
                        #cooling-cells = <2>;
                };
@@ -65,6 +71,8 @@
                        reg = <0x2>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
+                       interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &bimc SLV_EBI RPM_ACTIVE_TAG>;
                        next-level-cache = <&l2_0>;
                        #cooling-cells = <2>;
                };
@@ -75,6 +83,8 @@
                        reg = <0x3>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
+                       interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &bimc SLV_EBI RPM_ACTIVE_TAG>;
                        next-level-cache = <&l2_0>;
                        #cooling-cells = <2>;
                };
@@ -85,6 +95,8 @@
                        reg = <0x100>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
+                       interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &bimc SLV_EBI RPM_ACTIVE_TAG>;
                        next-level-cache = <&l2_1>;
                        #cooling-cells = <2>;
                };
@@ -95,6 +107,8 @@
                        reg = <0x101>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
+                       interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &bimc SLV_EBI RPM_ACTIVE_TAG>;
                        next-level-cache = <&l2_1>;
                        #cooling-cells = <2>;
                };
@@ -105,6 +119,8 @@
                        reg = <0x102>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
+                       interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &bimc SLV_EBI RPM_ACTIVE_TAG>;
                        next-level-cache = <&l2_1>;
                        #cooling-cells = <2>;
                };
@@ -115,6 +131,8 @@
                        reg = <0x103>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
+                       interconnects = <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &bimc SLV_EBI RPM_ACTIVE_TAG>;
                        next-level-cache = <&l2_1>;
                        #cooling-cells = <2>;
                };
@@ -471,6 +489,13 @@
                        clock-names = "core";
                };
 
+               bimc: interconnect@400000 {
+                       compatible = "qcom,msm8953-bimc";
+                       reg = <0x00400000 0x5a000>;
+
+                       #interconnect-cells = <2>;
+               };
+
                tsens0: thermal-sensor@4a9000 {
                        compatible = "qcom,msm8953-tsens", "qcom,tsens-v2";
                        reg = <0x004a9000 0x1000>, /* TM */
@@ -487,6 +512,29 @@
                        reg = <0x004ab000 0x4>;
                };
 
+               pcnoc: interconnect@500000 {
+                       compatible = "qcom,msm8953-pcnoc";
+                       reg = <0x00500000 0x12080>;
+
+                       clocks = <&gcc GCC_PCNOC_USB3_AXI_CLK>;
+                       clock-names = "pcnoc_usb3_axi";
+
+                       #interconnect-cells = <2>;
+               };
+
+               snoc: interconnect@580000 {
+                       compatible = "qcom,msm8953-snoc";
+                       reg = <0x00580000 0x16080>;
+
+                       #interconnect-cells = <2>;
+
+                       snoc_mm: interconnect-snoc {
+                               compatible = "qcom,msm8953-snoc-mm";
+
+                               #interconnect-cells = <2>;
+                       };
+               };
+
                tlmm: pinctrl@1000000 {
                        compatible = "qcom,msm8953-pinctrl";
                        reg = <0x01000000 0x300000>;
@@ -864,6 +912,13 @@
                        interrupt-controller;
                        #interrupt-cells = <1>;
 
+                       interconnects = <&snoc_mm MAS_MDP RPM_ALWAYS_TAG
+                                        &bimc SLV_EBI RPM_ALWAYS_TAG>,
+                                       <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &pcnoc SLV_DISP_SS_CFG RPM_ACTIVE_TAG>;
+                       interconnect-names = "mdp0-mem",
+                                            "cpu-cfg";
+
                        clocks = <&gcc GCC_MDSS_AHB_CLK>,
                                 <&gcc GCC_MDSS_AXI_CLK>,
                                 <&gcc GCC_MDSS_VSYNC_CLK>,
@@ -1080,6 +1135,11 @@
                                      "alwayson";
                        power-domains = <&gcc OXILI_GX_GDSC>;
 
+                       interconnects = <&bimc MAS_OXILI RPM_ALWAYS_TAG
+                                        &bimc SLV_EBI RPM_ALWAYS_TAG>,
+                                       <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &pcnoc SLV_GPU_CFG RPM_ACTIVE_TAG>;
+
                        iommus = <&gpu_iommu 0>;
                        operating-points-v2 = <&gpu_opp_table>;
 
@@ -1317,6 +1377,13 @@
                                          <&gcc GCC_USB30_MASTER_CLK>;
                        assigned-clock-rates = <19200000>, <133330000>;
 
+                       interconnects = <&pcnoc MAS_USB3 RPM_ALWAYS_TAG
+                                        &bimc SLV_EBI RPM_ALWAYS_TAG>,
+                                       <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &pcnoc SLV_USB3 RPM_ACTIVE_TAG>;
+                       interconnect-names = "usb-ddr",
+                                            "apps-usb";
+
                        power-domains = <&gcc USB30_GDSC>;
 
                        qcom,select-utmi-as-pipe-clk;
@@ -1369,6 +1436,13 @@
                                 <&rpmcc RPM_SMD_XO_CLK_SRC>;
                        clock-names = "iface", "core", "xo";
 
+                       interconnects = <&pcnoc MAS_SDCC_1 RPM_ALWAYS_TAG
+                                        &bimc SLV_EBI RPM_ALWAYS_TAG>,
+                                       <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &pcnoc SLV_SDCC_1 RPM_ACTIVE_TAG>;
+                       interconnect-names = "sdhc-ddr",
+                                            "cpu-sdhc";
+
                        power-domains = <&rpmpd MSM8953_VDDCX>;
                        operating-points-v2 = <&sdhc1_opp_table>;
 
@@ -1389,26 +1463,36 @@
 
                                opp-25000000 {
                                        opp-hz = /bits/ 64 <25000000>;
+                                       opp-peak-kBps = <200000>, <100000>;
+                                       opp-avg-kBps = <65360>, <32768>;
                                        required-opps = <&rpmpd_opp_low_svs>;
                                };
 
                                opp-50000000 {
                                        opp-hz = /bits/ 64 <50000000>;
+                                       opp-peak-kBps = <400000>, <200000>;
+                                       opp-avg-kBps = <130718>, <65360>;
                                        required-opps = <&rpmpd_opp_svs>;
                                };
 
                                opp-100000000 {
                                        opp-hz = /bits/ 64 <100000000>;
+                                       opp-peak-kBps = <400000>, <400000>;
+                                       opp-avg-kBps = <130718>, <65360>;
                                        required-opps = <&rpmpd_opp_svs>;
                                };
 
                                opp-192000000 {
                                        opp-hz = /bits/ 64 <192000000>;
+                                       opp-peak-kBps = <800000>, <600000>;
+                                       opp-avg-kBps = <261438>, <130718>;
                                        required-opps = <&rpmpd_opp_nom>;
                                };
 
                                opp-384000000 {
                                        opp-hz = /bits/ 64 <384000000>;
+                                       opp-peak-kBps = <800000>, <800000>;
+                                       opp-avg-kBps = <261438>, <300000>;
                                        required-opps = <&rpmpd_opp_nom>;
                                };
                        };
@@ -1429,6 +1513,13 @@
                                 <&rpmcc RPM_SMD_XO_CLK_SRC>;
                        clock-names = "iface", "core", "xo";
 
+                       interconnects = <&pcnoc MAS_SDCC_2 RPM_ALWAYS_TAG
+                                        &bimc SLV_EBI RPM_ALWAYS_TAG>,
+                                       <&bimc MAS_APPS_PROC RPM_ACTIVE_TAG
+                                        &pcnoc SLV_SDCC_2 RPM_ACTIVE_TAG>;
+                       interconnect-names = "sdhc-ddr",
+                                            "cpu-sdhc";
+
                        power-domains = <&rpmpd MSM8953_VDDCX>;
                        operating-points-v2 = <&sdhc2_opp_table>;
 
@@ -1445,26 +1536,36 @@
 
                                opp-25000000 {
                                        opp-hz = /bits/ 64 <25000000>;
+                                       opp-peak-kBps = <200000>, <100000>;
+                                       opp-avg-kBps = <65360>, <32768>;
                                        required-opps = <&rpmpd_opp_low_svs>;
                                };
 
                                opp-50000000 {
                                        opp-hz = /bits/ 64 <50000000>;
+                                       opp-peak-kBps = <400000>, <400000>;
+                                       opp-avg-kBps = <130718>, <65360>;
                                        required-opps = <&rpmpd_opp_svs>;
                                };
 
                                opp-100000000 {
                                        opp-hz = /bits/ 64 <100000000>;
+                                       opp-peak-kBps = <800000>, <400000>;
+                                       opp-avg-kBps = <130718>, <130718>;
                                        required-opps = <&rpmpd_opp_svs>;
                                };
 
                                opp-177770000 {
                                        opp-hz = /bits/ 64 <177770000>;
+                                       opp-peak-kBps = <600000>, <600000>;
+                                       opp-avg-kBps = <261438>, <130718>;
                                        required-opps = <&rpmpd_opp_nom>;
                                };
 
                                opp-200000000 {
                                        opp-hz = /bits/ 64 <200000000>;
+                                       opp-peak-kBps = <800000>, <800000>;
+                                       opp-avg-kBps = <261438>, <130718>;
                                        required-opps = <&rpmpd_opp_nom>;
                                };
                        };