i2c: rtl9300: introduce a property for 8 bit width reg address

In RTL9607C i2c controller, in order to indicate that the width of
memory address is 8 bits, 0 is written to MEM_ADDR_WIDTH field as
opposed to 1 for RTL9300 and RTL9310.

Introduce a new property to a driver data to indicate what value
need to written to MEM_ADDR_WIDTH field for this case.

Signed-off-by: Rustam Adilov <adilov@disroot.org>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20260401180648.337834-5-adilov@disroot.org

diff --git a/drivers/i2c/busses/i2c-rtl9300.c b/drivers/i2c/busses/i2c-rtl9300.c
index e40b4692a3fa7b75c4223e6dceee202579a03869..ffbc6c52861b80a3c070118483935d3cca570cc8 100644 (file)
--- a/drivers/i2c/busses/i2c-rtl9300.c
+++ b/drivers/i2c/busses/i2c-rtl9300.c
@@ -66,6 +66,7 @@ struct rtl9300_i2c_drv_data {
        u32 wd_reg;
        u8 max_nchan;
        u8 max_data_len;
+       u8 reg_addr_8bit_len;
 };
 
 #define RTL9300_I2C_MUX_NCHAN  8
@@ -111,6 +112,7 @@ struct rtl9300_i2c_xfer {
 #define RTL9300_I2C_MST_DATA_WORD2                     0x10
 #define RTL9300_I2C_MST_DATA_WORD3                     0x14
 #define RTL9300_I2C_MST_GLB_CTRL                       0x384
+#define RTL9300_REG_ADDR_8BIT_LEN                      1
 
 #define RTL9310_I2C_MST_IF_CTRL                                0x1004
 #define RTL9310_I2C_MST_IF_SEL                         0x1008
@@ -305,6 +307,7 @@ static int rtl9300_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr, unsigned s
                                  union i2c_smbus_data *data)
 {
        struct rtl9300_i2c_chan *chan = i2c_get_adapdata(adap);
+       const struct rtl9300_i2c_drv_data *drv_data;
        struct rtl9300_i2c *i2c = chan->i2c;
        struct rtl9300_i2c_xfer xfer = {0};
        int ret;
@@ -314,6 +317,7 @@ static int rtl9300_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr, unsigned s
 
        guard(rtl9300_i2c)(i2c);
 
+       drv_data = device_get_match_data(i2c->dev);
        ret = rtl9300_i2c_config_chan(i2c, chan);
        if (ret)
                return ret;
@@ -321,7 +325,7 @@ static int rtl9300_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr, unsigned s
        xfer.dev_addr = addr & 0x7f;
        xfer.write = (read_write == I2C_SMBUS_WRITE);
        xfer.reg_addr = command;
-       xfer.reg_addr_len = 1;
+       xfer.reg_addr_len = drv_data->reg_addr_8bit_len;
 
        switch (size) {
        case I2C_SMBUS_BYTE:
@@ -513,6 +517,7 @@ static const struct rtl9300_i2c_drv_data rtl9300_i2c_drv_data = {
        .wd_reg = RTL9300_I2C_MST_DATA_WORD0,
        .max_nchan = RTL9300_I2C_MUX_NCHAN,
        .max_data_len = RTL9300_I2C_MAX_DATA_LEN,
+       .reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN,
 };
 
 static const struct rtl9300_i2c_drv_data rtl9310_i2c_drv_data = {
@@ -536,6 +541,7 @@ static const struct rtl9300_i2c_drv_data rtl9310_i2c_drv_data = {
        .wd_reg = RTL9310_I2C_MST_DATA_CTRL,
        .max_nchan = RTL9310_I2C_MUX_NCHAN,
        .max_data_len = RTL9300_I2C_MAX_DATA_LEN,
+       .reg_addr_8bit_len = RTL9300_REG_ADDR_8BIT_LEN,
 };
 
 static const struct of_device_id i2c_rtl9300_dt_ids[] = {