]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ASoC: SOF: Intel: add initial support for WCL
authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Mon, 19 May 2025 08:08:53 +0000 (11:08 +0300)
committerTakashi Iwai <tiwai@suse.de>
Mon, 19 May 2025 20:40:03 +0000 (22:40 +0200)
Clone PTL and adjust the number of cores from 5 to 3.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.dev>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250519080855.16977-4-peter.ujfalusi@linux.intel.com
sound/soc/sof/intel/hda.h
sound/soc/sof/intel/pci-ptl.c
sound/soc/sof/intel/ptl.c

index 108cad04879eaceed64c7224a33b787699086004..e14f82c0831fadff54dd317ef742e919603551ec 100644 (file)
@@ -935,6 +935,7 @@ extern const struct sof_intel_dsp_desc mtl_chip_info;
 extern const struct sof_intel_dsp_desc arl_s_chip_info;
 extern const struct sof_intel_dsp_desc lnl_chip_info;
 extern const struct sof_intel_dsp_desc ptl_chip_info;
+extern const struct sof_intel_dsp_desc wcl_chip_info;
 
 /* Probes support */
 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_PROBES)
index 7d4c46f569317ca9416d6b5af990da75e7a4c591..68f6a98416335e4cf9f9d1fc72ebcd98f6386838 100644 (file)
@@ -55,10 +55,40 @@ static const struct sof_dev_desc ptl_desc = {
        .ops_init = sof_ptl_ops_init,
 };
 
+static const struct sof_dev_desc wcl_desc = {
+       .use_acpi_target_states = true,
+       .machines               = snd_soc_acpi_intel_ptl_machines,
+       .alt_machines           = snd_soc_acpi_intel_ptl_sdw_machines,
+       .resindex_lpe_base      = 0,
+       .resindex_pcicfg_base   = -1,
+       .resindex_imr_base      = -1,
+       .irqindex_host_ipc      = -1,
+       .chip_info              = &wcl_chip_info,
+       .ipc_supported_mask     = BIT(SOF_IPC_TYPE_4),
+       .ipc_default            = SOF_IPC_TYPE_4,
+       .dspless_mode_supported = true,
+       .default_fw_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ipc4/wcl",
+       },
+       .default_lib_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ipc4-lib/wcl",
+       },
+       .default_tplg_path = {
+               [SOF_IPC_TYPE_4] = "intel/sof-ipc4-tplg",
+       },
+       .default_fw_filename = {
+               [SOF_IPC_TYPE_4] = "sof-wcl.ri",
+       },
+       .nocodec_tplg_filename = "sof-ptl-nocodec.tplg",
+       .ops = &sof_ptl_ops,
+       .ops_init = sof_ptl_ops_init,
+};
+
 /* PCI IDs */
 static const struct pci_device_id sof_pci_ids[] = {
        { PCI_DEVICE_DATA(INTEL, HDA_PTL, &ptl_desc) }, /* PTL */
        { PCI_DEVICE_DATA(INTEL, HDA_PTL_H, &ptl_desc) }, /* PTL-H */
+       { PCI_DEVICE_DATA(INTEL, HDA_WCL, &wcl_desc) }, /* WCL */
        { 0, }
 };
 MODULE_DEVICE_TABLE(pci, sof_pci_ids);
index aa0b772178bcb02590dc3a74894dafa0c3d4bed8..875d18193b05407fa7f4e43a7376bdbc91eb9f70 100644 (file)
@@ -126,6 +126,29 @@ const struct sof_intel_dsp_desc ptl_chip_info = {
        .hw_ip_version = SOF_INTEL_ACE_3_0,
 };
 
+const struct sof_intel_dsp_desc wcl_chip_info = {
+       .cores_num = 3,
+       .init_core_mask = BIT(0),
+       .host_managed_cores_mask = BIT(0),
+       .ipc_req = MTL_DSP_REG_HFIPCXIDR,
+       .ipc_req_mask = MTL_DSP_REG_HFIPCXIDR_BUSY,
+       .ipc_ack = MTL_DSP_REG_HFIPCXIDA,
+       .ipc_ack_mask = MTL_DSP_REG_HFIPCXIDA_DONE,
+       .ipc_ctl = MTL_DSP_REG_HFIPCXCTL,
+       .rom_status_reg = LNL_DSP_REG_HFDSC,
+       .rom_init_timeout = 300,
+       .ssp_count = MTL_SSP_COUNT,
+       .d0i3_offset = MTL_HDA_VS_D0I3C,
+       .read_sdw_lcount =  hda_sdw_check_lcount_ext,
+       .check_sdw_irq = lnl_dsp_check_sdw_irq,
+       .check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq,
+       .check_ipc_irq = mtl_dsp_check_ipc_irq,
+       .cl_init = mtl_dsp_cl_init,
+       .power_down_dsp = mtl_power_down_dsp,
+       .disable_interrupts = lnl_dsp_disable_interrupts,
+       .hw_ip_version = SOF_INTEL_ACE_3_0,
+};
+
 MODULE_IMPORT_NS("SND_SOC_SOF_INTEL_MTL");
 MODULE_IMPORT_NS("SND_SOC_SOF_INTEL_LNL");
 MODULE_IMPORT_NS("SND_SOC_SOF_HDA_MLINK");