]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
dt-bindings: thermal: mediatek: Fix thermal zone definition for MT8186
authorJulien Panis <jpanis@baylibre.com>
Mon, 3 Jun 2024 10:50:48 +0000 (12:50 +0200)
committerDaniel Lezcano <daniel.lezcano@linaro.org>
Mon, 15 Jul 2024 11:31:39 +0000 (13:31 +0200)
Fix a thermal zone name for consistency with the other SoCs:
MFG contains GPU, the latter is more specific and must be used here.

The naming must be fixed "atomically" so compilation does not break.
As a result, the change is made in the dt-bindings and in the LVTS
driver within a single commit, despite the checkpatch warning.

The definition can be safely modified here because it is used only
in the LVTS driver, which is modified accordingly, and has not yet
been included in a released kernel.

Fixes: a2ca202350f9 ("dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT8186")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Link: https://lore.kernel.org/r/20240603-mtk-thermal-mt818x-dtsi-v7-1-8c8e3c7a3643@baylibre.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
drivers/thermal/mediatek/lvts_thermal.c
include/dt-bindings/thermal/mediatek,lvts-thermal.h

index 819ed0110f3e733409cb33bbcf6beffccf33ed2a..d3a8a1a3e6a31d43318e81001e287b8ab2cfbbcc 100644 (file)
@@ -1440,7 +1440,7 @@ static const struct lvts_ctrl_data mt8186_lvts_data_ctrl[] = {
                          .cal_offsets = { 29, 30, 31 } },
                        { .dt_id = MT8186_ADSP,
                          .cal_offsets = { 34, 35, 28 } },
-                       { .dt_id = MT8186_MFG,
+                       { .dt_id = MT8186_GPU,
                          .cal_offsets = { 39, 32, 33 } }
                },
                VALID_SENSOR_MAP(1, 1, 1, 0),
index bf95309d2525f0c603b9ea370ceb34249a9d2ba6..85d25b4d726d1f26880b0a5185105e449f6190d9 100644 (file)
@@ -24,7 +24,7 @@
 #define MT8186_BIG_CPU1        5
 #define MT8186_NNA             6
 #define MT8186_ADSP            7
-#define MT8186_MFG             8
+#define MT8186_GPU             8
 
 #define MT8188_MCU_LITTLE_CPU0 0
 #define MT8188_MCU_LITTLE_CPU1 1