]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: rockchip: Add DSI panel support for gameforce-ace
authorChris Morgan <macromorgan@hotmail.com>
Tue, 3 Jun 2025 19:39:30 +0000 (14:39 -0500)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 9 Jun 2025 08:56:03 +0000 (10:56 +0200)
Enable the DSI controller, DSI DCPHY, and Huiling hl055fhav028c
1080x1920 panel for the Gameforce Ace.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Link: https://lore.kernel.org/r/20250603193930.323607-5-macroalpha82@gmail.com
[moved lcd_rst pin into a lcd pinctrl group with lcd_bl_en]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts

index 873a2bd6a6de6744542ae5ccab0956b7f73a9fa4..55fc7cbef58d906a0572d19e6f07686ba5d02f38 100644 (file)
@@ -7,6 +7,7 @@
 #include <dt-bindings/leds/common.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/usb/pd.h>
 #include "rk3588s.dtsi"
        cpu-supply = <&vdd_cpu_big1_s0>;
 };
 
+&dsi0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       panel@0 {
+               compatible = "huiling,hl055fhav028c", "himax,hx8399c";
+               reg = <0>;
+               backlight = <&backlight>;
+               iovcc-supply = <&vcc3v3_lcd0_n>;
+               pinctrl-0 = <&lcd_rst>;
+               pinctrl-names = "default";
+               reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
+               rotation = <90>;
+               vcc-supply = <&vcc3v3_lcd0_n>;
+
+               port {
+                       mipi_panel_in: endpoint {
+                               remote-endpoint = <&dsi0_out_panel>;
+                       };
+               };
+       };
+};
+
+&dsi0_in {
+       dsi0_in_vp3: endpoint {
+               remote-endpoint = <&vp3_out_dsi0>;
+       };
+};
+
+&dsi0_out {
+       dsi0_out_panel: endpoint {
+               remote-endpoint = <&mipi_panel_in>;
+       };
+};
+
 &gpu {
        mali-supply = <&vdd_gpu_s0>;
        status = "okay";
        status = "okay";
 };
 
+&mipidcphy0 {
+       status = "okay";
+};
+
 &package_thermal {
        polling-delay = <1000>;
 
                };
        };
 
-       lcd_bl_en {
+       lcd {
                lcd_bl_en: lcd-bl-en {
                        rockchip,pins =
                                <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
                };
+
+               lcd_rst: lcd-rst {
+                       rockchip,pins =
+                               <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
        };
 
        pcie-pins {
                shutdown-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
        };
 };
+
+&vop {
+       status = "okay";
+};
+
+&vop_mmu {
+       status = "okay";
+};
+
+&vp3 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       vp3_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
+               reg = <ROCKCHIP_VOP2_EP_MIPI0>;
+               remote-endpoint = <&dsi0_in_vp3>;
+       };
+};