+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vreinterpretq_f64_p128,
+ vreinterpretq_p128_f64): Define.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/aarch64-simd-builtins.def (frintn): Use BUILTIN_VHSDF_HSDF
+ for modes. Remove explicit hf instantiation.
+ * config/aarch64/arm_neon.h (vrndns_f32): Define.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vtrn1q_p64, vtrn2q_p64, vuzp1q_p64,
+ vuzp2q_p64, vzip1q_p64, vzip2q_p64): Define.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vldrq_p128): Define.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vstrq_p128): Define.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vcls_u8, vcls_u16, vcls_u32,
+ vclsq_u8, vclsq_u16, vclsq_u32): Define.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vceqq_p64, vceqz_p64, vceqzq_p64): Define.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * config/aarch64/arm_neon.h (vadd_p8, vadd_p16, vadd_p64, vaddq_p8,
+ vaddq_p16, vaddq_p64, vaddq_p128): Define.
+
2020-09-27 Jakub Jelinek <jakub@redhat.com>
Backported from master:
+2020-09-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gcc-interface/decl.c (maybe_saturate_size): Add ALIGN parameter
+ and round down the result to ALIGN.
+ (gnat_to_gnu_entity): Adjust calls to maybe_saturate_size.
+
2020-09-11 Eric Botcazou <ebotcazou@adacore.com>
* gcc-interface/utils.c (type_has_variable_size): New function.
+2020-09-28 Mark Eggleston <markeggleston@gcc.gnu.org>
+
+ Revert:
+ 2020-09-27 Steven G. Kargl <kargl@gcc.gnu.org>
+ Mark Eggleston <markeggleston@gcc.gnu.org>
+
+ PR fortran/95614
+ * decl.c (gfc_get_common): Use gfc_match_common_name instead
+ of match_common_name.
+ * decl.c (gfc_bind_idents): Use gfc_match_common_name instead
+ of match_common_name.
+ * match.c : Rename match_common_name to gfc_match_common_name.
+ * match.c (gfc_match_common): Use gfc_match_common_name instead
+ of match_common_name.
+ * match.h : Rename match_common_name to gfc_match_common_name.
+ * resolve.c (resolve_common_vars): Check each symbol in a
+ common block has a global symbol. If there is a global symbol
+ issue an error if the symbol type is known as is not a common
+ block name.
+
2020-09-27 Mark Eggleston <markeggleston@gcc.gnu.org>
Backported from master:
+2020-09-28 Christophe Lyon <christophe.lyon@linaro.org>
+
+ Backported from master:
+ 2020-09-25 Christophe Lyon <christophe.lyon@linaro.org>
+
+ PR target/71233
+ * gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Remove
+ declarations of vector, vector2, vector_res for float64x2 type.
+ * gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise.
+ * gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
+ (clean_results): Add float64x2_t cleanup.
+ (DECL_VARIABLE_128BITS_VARIANTS): Add float64x2_t variable.
+ * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Add
+ testing of vreinterpretq_f64_p128, vreinterpretq_p128_f64.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * gcc.target/aarch64/simd/vrndns_f32_1.c: New test.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * gcc.target/aarch64/simd/trn_zip_p64_1.c: New test.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * gcc.target/aarch64/simd/vldrq_p128_1.c: New test.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * gcc.target/aarch64/simd/vstrq_p128_1.c: New test.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * gcc.target/aarch64/simd/vcls_unsigned_1.c: New test.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * gcc.target/aarch64/simd/vceq_poly_1.c: New test.
+
+2020-09-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ Backported from master:
+ 2020-09-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/71233
+ * gcc.target/aarch64/simd/vadd_poly_1.c: New test.
+
+2020-09-28 Mark Eggleston <markeggleston@gcc.gnu.org>
+
+ Revert:
+ 2020-09-28 Steven G. Kargl <kargl@gcc.gnu.org>
+ Mark Eggleston <markeggleston@gcc.gnu.org>
+
+ PR fortran/95614
+ * gfortran.dg/pr95614_1.f90: New test.
+ * gfortran.dg/pr95614_2.f90: New test.
+
+2020-09-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gnat.dg/addr16.adb: New test.
+ * gnat.dg/addr16_pkg.ads: New helper.
+
2020-09-27 Jakub Jelinek <jakub@redhat.com>
Backported from master: