backport: re PR target/65787 (Miscompile due to bad vector swap optimization for...

[gcc]

2015-04-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	    Jakub Jelinek  <jakub@redhat.com>

	Backport from mainline r222205
	2015-04-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	            Jakub Jelinek  <jakub@redhat.com>

	PR target/65787
	* config/rs6000/rs6000.c (rtx_is_swappable_p): Ensure that a
	subsequent SH_NONE operand does not overwrite an existing *special
	value.
	(adjust_extract): Handle case where a vec_extract operation is
	wrapped in a PARALLEL.

[gcc/testsuite]

2015-04-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r222205
	2015-04-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/65787
	* gcc.target/powerpc/pr65787.c: New.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r222222

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2c56a7048a6779176eb6c52dbfd3b5cd3296214d..a9cc39066069386fd6bec72a1cd472f60fc27b2a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2015-04-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+           Jakub Jelinek  <jakub@redhat.com>
+
+       Backport from mainline r222205
+       2015-04-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+                   Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/65787
+       * config/rs6000/rs6000.c (rtx_is_swappable_p): Ensure that a
+       subsequent SH_NONE operand does not overwrite an existing *special
+       value.
+       (adjust_extract): Handle case where a vec_extract operation is
+       wrapped in a PARALLEL.
+
 2015-04-02  John David Anglin  <danglin@gcc.gnu.org>
 
        * config/pa/pa.c (pa_output_move_double): Directly handle register

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index c69f3d355097f30f9b5e4f2134af49a00af9cdc1..7eeb74de2ab29faa1c9d246dc57fc2064bc519a9 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -33677,10 +33677,11 @@ rtx_is_swappable_p (rtx op, unsigned int *special)
       {
        unsigned int special_op = SH_NONE;
        ok &= rtx_is_swappable_p (XEXP (op, i), &special_op);
+       if (special_op == SH_NONE)
+         continue;
        /* Ensure we never have two kinds of special handling
           for the same insn.  */
-       if (*special != SH_NONE && special_op != SH_NONE
-           && *special != special_op)
+       if (*special != SH_NONE && *special != special_op)
          return 0;
        *special = special_op;
       }
@@ -33689,10 +33690,11 @@ rtx_is_swappable_p (rtx op, unsigned int *special)
        {
          unsigned int special_op = SH_NONE;
          ok &= rtx_is_swappable_p (XVECEXP (op, i, j), &special_op);
+       if (special_op == SH_NONE)
+         continue;
          /* Ensure we never have two kinds of special handling
             for the same insn.  */
-         if (*special != SH_NONE && special_op != SH_NONE
-             && *special != special_op)
+         if (*special != SH_NONE && *special != special_op)
            return 0;
          *special = special_op;
        }
@@ -33998,7 +34000,10 @@ permute_store (rtx insn)
 static void
 adjust_extract (rtx insn)
 {
-  rtx src = SET_SRC (PATTERN (insn));
+  rtx pattern = PATTERN (insn);
+  if (GET_CODE (pattern) == PARALLEL)
+    pattern = XVECEXP (pattern, 0, 0);
+  rtx src = SET_SRC (pattern);
   /* The vec_select may be wrapped in a vec_duplicate for a splat, so
      account for that.  */
   rtx sel = GET_CODE (src) == VEC_DUPLICATE ? XEXP (src, 0) : src;

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1d60a1edec0f4275de8106400e2716ea45cccca0..20f7e9eb9835f8d1db3baf8a677963baa468ee97 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2015-04-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       Backport from mainline r222205
+       2015-04-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       PR target/65787
+       * gcc.target/powerpc/pr65787.c: New.
+
 2015-04-14  Mikael Morin  <mikael@gcc.gnu.org>
 
        PR fortran/56674

diff --git a/gcc/testsuite/gcc.target/powerpc/pr65787.c b/gcc/testsuite/gcc.target/powerpc/pr65787.c
new file mode 100644 (file)
index 0000000..c819be9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr65787.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O3" } */
+/* { dg-final { scan-assembler "xxsldwi \[0-9\]*,\[0-9\]*,\[0-9\]*,3" } } */
+/* { dg-final { scan-assembler-not "xxpermdi" } } */
+
+/* This test verifies that a vector extract operand properly has its
+   lane changed by the swap optimization.  Element 2 of LE corresponds
+   to element 1 of BE.  When doublewords are swapped, this becomes
+   element 3 of BE, so we need to shift the vector left by 3 words
+   to be able to extract the correct value from BE element zero.  */
+
+typedef float  v4f32 __attribute__ ((__vector_size__ (16)));
+
+void foo (float);
+extern v4f32 x, y;
+
+int main() {
+  v4f32 z = x + y;
+  foo (z[2]);
+}