]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm: dts: omap: Add support for BeagleBone Green Eco board
authorKory Maincent <kory.maincent@bootlin.com>
Fri, 20 Jun 2025 08:15:54 +0000 (10:15 +0200)
committerKevin Hilman <khilman@baylibre.com>
Mon, 30 Jun 2025 17:55:51 +0000 (10:55 -0700)
SeeedStudio BeagleBone Green Eco (BBGE) is a clone of the BeagleBone Green
(BBG). It has minor differences from the BBG, such as a different PMIC,
a different Ethernet PHY, and a larger eMMC.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250620-bbg-v5-3-84f9b9a2e3a8@bootlin.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/ti/omap/Makefile
arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts [new file with mode: 0644]

index 95c68135dd0c52640e4b44adec7224f6837b96ef..1aef60eef671809bb45887b0d1d6bdcf1ddfccb5 100644 (file)
@@ -93,6 +93,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
        am335x-boneblue.dtb \
        am335x-bonegreen.dtb \
        am335x-bonegreen-wireless.dtb \
+       am335x-bonegreen-eco.dtb \
        am335x-chiliboard.dtb \
        am335x-cm-t335.dtb \
        am335x-evm.dtb \
diff --git a/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts b/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts
new file mode 100644 (file)
index 0000000..d21118c
--- /dev/null
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2025 Bootlin
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-bonegreen-common.dtsi"
+#include <dt-bindings/net/ti-dp83867.h>
+
+/ {
+       model = "Seeed Studio BeagleBone Green Eco";
+       compatible = "seeed,am335x-bone-green-eco", "ti,am33xx";
+
+       cpus {
+               cpu@0 {
+                       cpu0-supply = <&buck1>;
+               };
+       };
+
+       sys_5v: regulator-sys-5v {
+               compatible = "regulator-fixed";
+               regulator-name = "sys_5v";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+       };
+
+       v3v3: regulator-v3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "v3v3";
+               regulator-always-on;
+       };
+};
+
+&usb0 {
+       interrupts-extended = <&intc 18>;
+       interrupt-names = "mc";
+};
+
+&baseboard_eeprom {
+       vcc-supply = <&v3v3>;
+};
+
+&i2c0 {
+       /delete-node/ pmic@24;
+
+       tps65214: pmic@30 {
+               compatible = "ti,tps65214";
+               reg = <0x30>;
+               buck1-supply = <&sys_5v>;
+               buck2-supply = <&sys_5v>;
+               buck3-supply = <&sys_5v>;
+               ldo1-supply = <&sys_5v>;
+               ldo2-supply = <&sys_5v>;
+
+               interrupt-parent = <&intc>;
+               interrupts = <7>;
+               pinctrl-0 = <&pmic_irq_pins_default>;
+
+               regulators {
+                       buck1: buck1 {
+                               regulator-name = "vdd_mpu";
+                               regulator-min-microvolt = <925000>;
+                               regulator-max-microvolt = <1298500>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck2: buck2 {
+                               regulator-name = "vdd_core";
+                               regulator-min-microvolt = <925000>;
+                               regulator-max-microvolt = <1150000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       buck3: buck3 {
+                               regulator-name = "vdds_ddr";
+                               regulator-min-microvolt = <1350000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-always-on;
+                       };
+
+                       ldo1_reg: ldo1 {
+                               regulator-name = "vdd_1v8_1";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       ldo2_reg: ldo2 {
+                               regulator-name = "vdd_1v8_2";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+               };
+       };
+};
+
+&cpsw_port1 {
+       phy-mode = "rgmii-id";
+       phy-handle = <&dp83867_0>;
+       ti,dual-emac-pvid = <1>;
+};
+
+&mac_sw {
+       pinctrl-0 = <&cpsw_b_default>;
+       pinctrl-1 = <&cpsw_b_sleep>;
+};
+
+&davinci_mdio_sw {
+       /delete-node/ ethernet-phy@0;
+
+       dp83867_0: ethernet-phy@0 {
+               reg = <0>;
+               ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
+               ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
+               ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+               ti,min-output-impedance;
+               ti,dp83867-rxctrl-strap-quirk;
+       };
+};
+
+&am33xx_pinmux {
+       cpsw_b_default: cpsw-b-default-pins {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
+               >;
+       };
+
+       cpsw_b_sleep: cpsw-b-sleep-pins {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
+               >;
+       };
+
+       pmic_irq_pins_default: pmic-irq-default-pins {
+               pinctrl-single,pins = <
+                       AM33XX_IOPAD(AM335X_PIN_NNMI, PIN_INPUT_PULLUP | MUX_MODE0)
+               >;
+       };
+};