]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a
authorWangYuli <wangyuli@uniontech.com>
Wed, 16 Apr 2025 03:45:48 +0000 (11:45 +0800)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Sun, 27 Apr 2025 07:36:32 +0000 (09:36 +0200)
Similar to commit 98a9e2ac3755 ("MIPS: Loongson64: DTS: Fix msi node for ls7a").

Fix follow warnings:
  arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts:28.31-36.4: Warning (interrupt_provider): /bus@10000000/msi-controller@2ff00000: Missing '#interrupt-cells' in interrupt provider
  arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider'

Fixes: 24af105962c8 ("MIPS: Loongson64: DeviceTree for LS7A PCH")
Tested-by: WangYuli <wangyuli@uniontech.com>
Signed-off-by: WangYuli <wangyuli@uniontech.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts

index c7ea4f1c0bb21f806610734521e9e425df4fa7ca..6c277ab83d4b94d838b851486a968df74866667f 100644 (file)
@@ -29,6 +29,7 @@
                compatible = "loongson,pch-msi-1.0";
                reg = <0 0x2ff00000 0 0x8>;
                interrupt-controller;
+               #interrupt-cells = <1>;
                msi-controller;
                loongson,msi-base-vec = <64>;
                loongson,msi-num-vecs = <64>;