Only i915 uses the pending_fb_pin counter to potentially whack
the GPU harder if the display gets nuked during a GPU reset.
Move the atomic counter into the i915 specific bits of code, so
that we don't need to worry about on the display side.
For some reason the overlay code kept the pending_fb_pin counter
elevated for longer than just for the pin, but from now on it'll
just cover the actual pinning part.
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260415210411.24750-5-ville.syrjala@linux.intel.com
struct drm_atomic_state *modeset_state;
struct drm_modeset_acquire_ctx reset_ctx;
/* modeset stuck tracking for reset */
- atomic_t pending_fb_pin;
u32 saveDSPARB;
u32 saveSWF0[16];
u32 saveSWF1[16];
display->params.force_reset_modeset_test;
}
-void intel_display_reset_prepare(struct intel_display *display,
- modeset_stuck_fn modeset_stuck, void *context)
+void intel_display_reset_prepare(struct intel_display *display)
{
struct drm_modeset_acquire_ctx *ctx = &display->restore.reset_ctx;
struct drm_atomic_state *state;
int ret;
- if (atomic_read(&display->restore.pending_fb_pin)) {
- drm_dbg_kms(display->drm,
- "Modeset potentially stuck, unbreaking through wedging\n");
- modeset_stuck(context);
- }
-
/*
* Need mode_config.mutex so that we don't
* trample ongoing ->detect() and whatnot.
struct intel_display;
-typedef void modeset_stuck_fn(void *context);
-
bool intel_display_reset_supported(struct intel_display *display);
bool intel_display_reset_test(struct intel_display *display);
-void intel_display_reset_prepare(struct intel_display *display,
- modeset_stuck_fn modeset_stuck, void *context);
+void intel_display_reset_prepare(struct intel_display *display);
void intel_display_reset_finish(struct intel_display *display, bool test_only);
#endif /* __INTEL_RESET_H__ */
if (ret != 0)
return ret;
- atomic_inc(&display->restore.pending_fb_pin);
-
vma = intel_parent_overlay_pin_fb(display, obj, &offset);
- if (IS_ERR(vma)) {
- ret = PTR_ERR(vma);
- goto out_pin_section;
- }
+ if (IS_ERR(vma))
+ return PTR_ERR(vma);
if (!intel_parent_overlay_is_active(display)) {
const struct intel_crtc_state *crtc_state =
out_unpin:
intel_parent_overlay_unpin_fb(display, vma);
-out_pin_section:
- atomic_dec(&display->restore.pending_fb_pin);
return ret;
}
return err;
}
-static void display_reset_modeset_stuck(void *gt)
-{
- intel_gt_set_wedged(gt);
-}
-
static void intel_gt_reset_global(struct intel_gt *gt,
u32 engine_mask,
const char *reason)
intel_display_reset_test(display) ||
need_display_reset;
- if (reset_display)
- intel_display_reset_prepare(display,
- display_reset_modeset_stuck,
- gt);
+ if (reset_display) {
+ if (atomic_read(&i915->pending_fb_pin)) {
+ drm_dbg_kms(&i915->drm,
+ "Modeset potentially stuck, unbreaking through wedging\n");
+
+ intel_gt_set_wedged(gt);
+ }
+
+ intel_display_reset_prepare(display);
+ }
intel_gt_reset(gt, engine_mask, reason);
struct i915_vma *i915_dpt_pin_to_ggtt(struct intel_dpt *dpt, unsigned int alignment)
{
struct drm_i915_private *i915 = dpt->vm.i915;
- struct intel_display *display = i915->display;
struct ref_tracker *wakeref;
struct i915_vma *vma;
void __iomem *iomem;
pin_flags |= PIN_MAPPABLE;
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- atomic_inc(&display->restore.pending_fb_pin);
+ atomic_inc(&i915->pending_fb_pin);
for_i915_gem_ww(&ww, err, true) {
err = i915_gem_object_lock(dpt->obj, &ww);
dpt->obj->mm.dirty = true;
- atomic_dec(&display->restore.pending_fb_pin);
+ atomic_dec(&i915->pending_fb_pin);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
return err ? ERR_PTR(err) : vma;
/* The TTM device structure. */
struct ttm_device bdev;
+ atomic_t pending_fb_pin;
+
I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;)
/*
unsigned int alignment,
struct intel_dpt *dpt)
{
- struct intel_display *display = to_intel_display(fb->dev);
struct drm_i915_private *i915 = to_i915(fb->dev);
struct drm_gem_object *_obj = intel_fb_bo(fb);
struct drm_i915_gem_object *obj = to_intel_bo(_obj);
if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
return ERR_PTR(-EINVAL);
- atomic_inc(&display->restore.pending_fb_pin);
+ atomic_inc(&i915->pending_fb_pin);
for_i915_gem_ww(&ww, ret, true) {
ret = i915_gem_object_lock(obj, &ww);
i915_vma_get(vma);
err:
- atomic_dec(&display->restore.pending_fb_pin);
+ atomic_dec(&i915->pending_fb_pin);
return vma;
}
*/
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- atomic_inc(&display->restore.pending_fb_pin);
+ atomic_inc(&i915->pending_fb_pin);
/*
* Valleyview is definitely limited to scanning out the first
if (ret)
vma = ERR_PTR(ret);
- atomic_dec(&display->restore.pending_fb_pin);
+ atomic_dec(&i915->pending_fb_pin);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
return vma;
}
struct drm_gem_object *obj,
u32 *offset)
{
+ struct drm_i915_private *i915 = to_i915(drm);
struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
struct i915_gem_ww_ctx ww;
struct i915_vma *vma;
int ret;
+ atomic_inc(&i915->pending_fb_pin);
+
i915_gem_ww_ctx_init(&ww, true);
retry:
ret = i915_gem_object_lock(new_bo, &ww);
goto retry;
}
i915_gem_ww_ctx_fini(&ww);
+
+ atomic_dec(&i915->pending_fb_pin);
+
if (ret)
return ERR_PTR(ret);